Patents by Inventor Koji Tsuneto

Koji Tsuneto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of designing wiring for power sources in a semiconductor chip, and a computer product
    Patent number: 6604229
    Abstract: In a higher layer, power source wiring is provisionally provided between a logic-decided functional block and the logic-undecided functional block. Then, a resistor network of the power source wiring within the logic-undecided functional block is prepared by assuming that a current source has been connected to a power source terminal of the logic-undecided functional block. A resistor network of a total power source wiring in the higher layer is prepared by using this local resistor network. An optimum width of the power source wiring is determined by analyzing this resistor network. Based on the width, the power source wiring of the higher layer is rewired.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: August 5, 2003
    Assignee: Fujitsu Limited
    Inventors: Kenji Suzuki, Koji Banno, Toru Osajima, Takashi Yoneda, Takanori Nawa, Koji Tsuneto, Masuo Inui, Hiroyuki Yamamoto
  • Method of designing wiring for power sources in a semiconductor chip, and a computer product
    Publication number: 20020032897
    Abstract: In a higher layer, power source wiring is provisionally provided between a logic-decided functional block and the logic-undecided functional block. Then, a resistor network of the power source wiring within the logic-undecided functional block is prepared by assuming that a current source has been connected to a power source terminal of the logic-undecided functional block. A resistor network of a total power source wiring in the higher layer is prepared by using this local resistor network. An optimum width of the power source wiring is determined by analyzing this resistor network. Based on the width, the power source wiring of the higher layer is rewired.
    Type: Application
    Filed: March 21, 2001
    Publication date: March 14, 2002
    Inventors: Kenji Suzuki, Koji Banno, Toru Osajima, Takashi Yoneda, Takanori Nawa, Koji Tsuneto, Masuo Inui, Hiroyuki Yamamoto