Patents by Inventor Koji Wakayama

Koji Wakayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020176414
    Abstract: An access node run as a packet switching apparatus enables IP connection services for a plurality of access methods; e.g., relatively low-speed IP connection, high-speed IP connection, and mobile network IP connection. By using this apparatus of the present invention, cost can be reduced and upgrading to advanced access networks and access services is easily carried out. Provision of the above access nodes implements upgrade-type network services common for diverse protocols. Each access node retains a pathfinding table to which input port, input tunnel identifier and input session identifier entries in a set are registered per session. When routing a packet, by looking up the set of these entries matching with the packet, the associated output port, output tunnel identifier, and output session identifier are obtained. After processing for the packet, appropriate for one of the plurality of access methods and network services, the node forwards the packet over the routed path.
    Type: Application
    Filed: August 9, 2001
    Publication date: November 28, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Kazuho Miki, Ken?apos;ichi Sakamoto, Koji Wakayama, Tetsuhiko Hirata, Hiroaki Miyata
  • Publication number: 20020167938
    Abstract: A packet switching apparatus is constructed by a basic module disposed in the apparatus casing and an additional module disposed on the outside of the apparatus casing. The basic module has a common processing function irrespective of an access method and a service type, an interface accommodating lines to be connected to the Internet, and a plurality of interface boards conformed to a specific access method by which a hardware scale may be small. Only the basic module functions as a packet switching apparatus, and a processing function peculiar to each access method and service type is executed by the additional module.
    Type: Application
    Filed: August 29, 2001
    Publication date: November 14, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Koji Wakayama, Ken?apos;ichi Sakamoto, Hiroaki Miyata, Shiro Tanabe
  • Publication number: 20020136244
    Abstract: A router apparatus 5 is provided with an ATM switch, an IP controller for performing routing control as a controller for layer 3, plural kinds of interfaces which are individually provided to plural transmission paths in which various communications are performed, and a cell multiplexing/demultiplexing unit, and manages the cell communications between respective parts on the basis of identification information. The input packet is subjected to IP processing in an interface to be converted to a cell in a common format, and the cell is serially multiplexed with a cell from another interface on a cell basis, and transmitted to the ATM switch at the cell multiplexing/demultiplexing unit. Each interface and each cell multiplexing/demultiplexing unit sets and switches the identification information for the header portion of the packet and the cell to be communicated by using a table in which the corresponding relationship of the identification information is registered.
    Type: Application
    Filed: May 23, 2002
    Publication date: September 26, 2002
    Inventors: Kazuho Miki, Masahiro Takatori, Akihiko Takase, Masaru Murakami, Koji Wakayama, Tetsuro Yoshimoto, Masao Kunimoto
  • Patent number: 6424662
    Abstract: A router apparatus 5 is provided with an ATM switch, an IP controller for performing routing control as a controller for layer 3, plural kinds of interfaces which are individually provided to plural transmission paths in which various communications are performed, and a cell multiplexing/demultiplexing unit, and manages the cell communications between respective parts on the basis of identification information. The input packet is subjected to IP processing in an interface to be converted to a cell in a common format, and the cell is serially multiplexed with a cell from another interface on a cell basis, and transmitted to the ATM switch at the cell multiplexing/demultiplexing unit. Each interface and each cell multiplexing/demultiplexing unit sets and switches the identification information for the header portion of the packet and the cell to be communicated by using a table in which the corresponding relationship of the identification information is registered.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: July 23, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Kazuho Miki, Masahiro Takatori, Akihiko Takase, Masaru Murakami, Koji Wakayama, Tetsuro Yoshimoto, Masao Kunimoto
  • Patent number: 6385171
    Abstract: An LAN interface unit and an ATM switch unit cooperate to perform traffic control. A QoS unit monitors circumstances of an input buffer from a multiplexer of the ATM switch by means of a system controller and when an overflow of the input buffer is expected, the LAN interface unit of the multiplexer is instructed to perform traffic control. The LAN interface unit performs traffic control such as limitation of ATM cells inputted in the ATM switch.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: May 7, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Akihiko Takase, Masahiro Takatori, Kazuho Miki, Masaru Murakami, Koji Wakayama, Tetsuro Yoshimoto, Masao Kunimoto
  • Publication number: 20010049739
    Abstract: In a device that interworks a VLAN network and an MPLS network, a VLAN ID is associated with an MPLS label. In a device that performs interworking from a VLAN network to an MPLS network, an output MPLS label is determined from a pair of a VLAN ID and the information in the layer 3 or layer 4 header of a packet. The output MPLS label is assigned an independent value for each VLAN. In a device that performs interworking from the MPLS network to another VLAN network, the input MPLS label is associated with a VLAN ID.
    Type: Application
    Filed: February 12, 2001
    Publication date: December 6, 2001
    Inventors: Koji Wakayama, Kenichi Sakamoto, Takeshi Aimoto, Takahisa Miyamoto
  • Patent number: 6046999
    Abstract: A router apparatus 5 is provided with an ATM switch, an IP controller for performing routing control as a controller for layer 3, plural kinds of interfaces which are individually provided to plural transmission paths in which various communications are performed, and a cell multiplexing/demultiplexing unit, and manages the cell communications between respective parts on the basis of identification information. The input packet is subjected to IP processing in an interface to be converted to a cell in a common format, and the cell is serially multiplexed with a cell from another interface on a cell basis, and transmitted to the ATM switch at the cell multiplexing/demultiplexing unit. Each interface and each cell multiplexing/demultiplexing unit sets and switches the identification information for the header portion of the packet and the cell to be communicated by using a table in which the corresponding relationship of the identification information is registered.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: April 4, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Kazuho Miki, Masahiro Takatori, Akihiko Takase, Masaru Murakami, Koji Wakayama, Tetsuro Yoshimoto, Masao Kunimoto
  • Patent number: 5963555
    Abstract: An LAN interface unit and an ATM switch unit cooperate to perform traffic control. A QoS unit monitors circumstances of an input buffer from a multiplexer of the ATM switch by means of a system controller and when an overflow of the input buffer is expected, the LAN interface unit of the multiplexer is instructed to perform traffic control. The LAN interface unit performs traffic control such as limitation of ATM cells inputted in the ATM switch.
    Type: Grant
    Filed: September 2, 1997
    Date of Patent: October 5, 1999
    Inventors: Akihiko Takase, Masahiro Takatori, Kazuho Miki, Masaru Murakami, Koji Wakayama, Tetsuro Yoshimoto, Masao Kunimoto