Abstract: CRLH lines including left-handed shunt inductors and left-handed series capacitors are provided on gate side transmission lines of a plurality of FETs.

Abstract: A stub whose end is connected to an end of a transmission line, and a coupled line disposed in parallel with each of the transmission line and the stub, and electromagnetically coupled to each of the transmission line and the stub are included, and the stub and the coupled line operate as a first resonator for resonating with an odd order harmonic included in the amplified signal, and the transmission line, the stub, and the coupled line operate as a second resonator for resonating with an even order harmonic included in the amplified signal.

Abstract: A conventional Doherty amplifier requires a load modulation line having an electrical length of 90 degrees, a frequency compensation line having an electrical length of an integral (n) multiple of 180 degrees, and an input phase adjustment line having an electrical length corresponding to a difference (180°×n?90°) between the electrical length of the load modulation line and the electrical length of the frequency compensation line. Thus, the conventional Doherty amplifier has a problem of an increase in circuit size.

Abstract: In a semiconductor device including gate fingers each having a linear shape extending from a feed line, and arranged in areas between drain electrodes and source electrodes, open stubs are connected directly to the feed line.

Abstract: A switch element is arranged between an input terminal and an output terminal. A signal from the input terminal is distributed by a capacitative element and supplied to the cathode side of a diode. An inductor is connected to the cathode side of the diode, and a smoothing circuit including a capacitative element and a resistor is connected to the anode side. The switch element has a control terminal connected to the anode of the diode, and turns off a path between the input terminal and the output terminal when a voltage is applied to the control terminal.

Abstract: A first inductor is connected to an input terminal through a capacitive element. To the first inductor, an anti-parallel diode pair including a first diode and a second diode, and a second inductor are connected. The first inductor and the anti-parallel diode pair are coupled to each other by an electromagnetic field, thereby forming a coupling capacitance.

Abstract: A diluted solution production method of the present invention is a diluted solution production method of producing a diluted solution of a second liquid by adding the second liquid a first liquid, the method including feeding the first liquid to a first pipe; and controlling pressure in a tank that stores the second liquid to add, through the second pipe that connects the tank to the first pipe, the second liquid to the first liquid in the first pipe. Adding the second liquid includes measuring a flow rate of the first liquid or the diluted solution that flows through the first pipe; measuring a component concentration of the diluted solution; and controlling the pressure in the tank, based on the measured values of the flow rate and the component concentration, so as to adjust the component concentration of the diluted solution to a specified value.

Abstract: A semiconductor device includes: an underlying substrate; a semiconductor layer formed on the underlying substrate; electrode patterns in which a drain electrode and a source electrode are alternately arranged along an array direction determined in advance, on the semiconductor layer; and a group of gate fingers each having a shape extending in an extending direction which is different from the array direction. Each of the gate fingers is disposed in a region between the drain electrode and the source electrode. Moreover, the gate fingers are arranged at positions displaced from one another in the extending direction.

Abstract: A plurality of gate finger electrodes (2) is each arranged in a manner alternately adjacent to a corresponding one of drain electrodes (3) and a corresponding one of source electrode (4). The plurality of gate finger electrodes (2) is each connected to a corresponding one of gate routing lines (6). A resistor (7) has one end separating the gate routing lines (6) on respective two sides at a center portion between the gate routing lines (6), and has another end connected to an input line (10). Capacitors (8) are arranged on the respective two sides with respect to the resistor (7) and each connected to the corresponding gate routing line (6) by a corresponding one of air bridges (9).

Abstract: Time until a conductivity meter is ready to measure a conductivity after an electric decationizing apparatus starts is shortened. Water to be treated that contains cations and anions is supplied to the electric decationizing apparatus while applying a first voltage to the electric decationizing apparatus, and decationized water is generated. Next, the decationized water that is generated by the electric decationizing apparatus is supplied to the conductivity meter in order to measure conductivity of the decationized water. Before the first voltage is applied to the electric decationizing apparatus and before the conductivity meter begins measuring the conductivity of the decationized water, a second voltage that is lower than the first voltage is applied to the electric decationizing apparatus in a state in which the electric decationizing apparatus is charged with water to be treated.

Abstract: A high-frequency power amplifier is configured to include plural island patterns (28) in which ends thereof are arranged in the vicinity of a transmission line (23) and other ends thereof are arranged in the vicinity of an end line (24a) in a transmission line (24), a wire (30) for connecting an end of an island pattern (28) and the transmission line (23), and a wire (31) for connecting another end of the island pattern (28) and the end line (24a) of the second transmission line (24), so that a mismatch of the impedance component having a resistance component and a reactance component can be compensated for by changing the number of first connecting members and the number of second connecting members, the first and second connecting members configured to connect an island pattern (28) to the transmission lines (23) and (24).

Abstract: Parallel inductors include a first metal wire (8a or 8b) for connecting a drain terminal (2) and a first metal pattern (7a or 7b), and a second metal wire (10a or 10b) for connecting the first metal pattern (7a or 7b) and a second metal pattern (9a or 9b). The second metal wires (10a and 10b) are each positioned between the corresponding first metal wire (8a or 8b) and a corresponding third metal wire (12a or 12b) for connecting the drain terminal (2) and a third metal pattern (11). The direction of current through the second metal wires (10a and 10b) is opposite to the direction of current through each of the first metal wire (8a or 8b) and the third metal wire (12a or 12b).

Abstract: Gate fingers (2-1 to 2-6) are arranged in one direction and each of the gate fingers is disposed so as to be adjacent to a corresponding one of drain electrodes (3-1 to 3-3) and a corresponding one of source electrodes (4-1 to 4-4) alternately, and have non-uniform gate head lengths.

Abstract: Included is a compensation circuit (9) having one end connected to another end of a first output circuit (7) and another end of a second output circuit (8) and another end grounded, the compensation circuit having an electrical length of 90 degrees at a first operation frequency and an electrical length of 45 degrees at a second operation frequency which is half of the first operation frequency.

Abstract: A semiconductor device includes; an underlying substrate; a semiconductor layer formed on the underlying substrate; electrode patterns in which a drain electrode and a source electrode are alternately arranged along an array direction determined in advance, on the semiconductor layer; and a group of gate fingers each having a shape extending in an extending direction which is different from the array direction. Each of the gate fingers is disposed in a region between the drain electrode and the source electrode. Moreover, the gate fingers are arranged at positions displaced from one another in the extending direction.

Abstract: Gate fingers (2-1 to 2-6) are arranged in one direction and each of the gate fingers is disposed so as to be adjacent to a corresponding one of drain electrodes (3-1 to 3-3) and a corresponding one of source electrodes (4-1 to 4-4) alternately, and have non-uniform gate head lengths.

Abstract: A method for purifying an organic solvent, comprising contacting an organic solvent containing polyvalent metal ions with a monolithic organic porous ion exchanger. According to the present invention, a method for purifying an organic solvent can be provided, wherein a high rate of removing polyvalent metal ions in an organic solvent is achieved.

Abstract: In a case where the power of a signal to be amplified is greater than or equal to a threshold value, a signal distributor (2) outputs one of signals to a carrier amplifier (6), outputs another signal, a phase of which is 90 degrees behind that of the one of the signals, to a peak amplifier (8), and adjusts a phase shift amount of a signal shifted by a phase shifter (7) depending on the frequency of the signal to be amplified. In a case where the power of the signal to be amplified is less than the threshold value, the signal distributor (2) outputs the one of the signals to the carrier amplifier (6) without outputting the other signal to the peak amplifier (8).

Abstract: A Doherty amplifier includes a carrier amplifier, a peaking amplifier, and a phase compensation circuit. The carrier amplifier 11 includes a main amplifying element and a parasitic element, and the peaking amplifier includes an auxiliary amplifying element and a parasitic element. The phase compensation circuit has a negative electrical length that allows a total electrical length of a signal transmission path starting from an output source of the main amplifying element to a power combiner to become 180°×N?90° where N is a positive integer. In addition, a signal transmission path starting from an output source of the auxiliary amplifying element to the power combiner has an electrical length of 180°×M?180° where M is a positive integer.

Abstract: A first stabilizing circuit (7a) is disposed between a first transistor (5a) and a first output matching circuit (10a) in a first stage. A second stabilizing circuit (7b) is disposed between a second transistor (5b) and a second output matching circuit (10b) in a second stage. The first stabilizing circuit (7a) includes a first band-pass filter and a first resistor (103a) connected in parallel. The first band-pass filter allows a signal of a frequency f1 lower than a central frequency fc of the operation frequencies as an amplifier to pass through. The second stabilizing circuit (7b) includes a second band-pass filter and a second resistor (103b) connected in parallel. The second band-pass filter allows a signal of a frequency f2 higher than the central frequency fc to pass through.