Patents by Inventor Kok Seong Lee

Kok Seong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9577640
    Abstract: Flexible, space-efficient I/O architectures for integrated circuits simplify circuit design and shorten design times. In one aspect, cells for power supply pads are eliminated, in part by locating ESD circuitry for these pads underneath the pads themselves, leaving only signal I/O buffers. Pads coupled to the signal I/O buffers may be defined as either signal I/O pads or power supply pads in accordance with customization circuitry. Customization circuitry also provides for flexible bank architectures, where signal I/O buffers within a bank share power supply requirements that may be different from another bank. The number of banks and the number of signal I/O buffers belonging to each bank is flexibly defined. In other aspects, ESD circuitry is provided at corners of the IC layout and optionally within selected I/O slots. Decap circuitry is provided at an outer edge of the IC layout and is scalable in order to meet different requirements.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: February 21, 2017
    Assignee: Baysand Inc.
    Inventors: Jonathan C Park, Yin Hao Liew, Kok Seong Lee, Salah M Werfelli
  • Patent number: 9401717
    Abstract: Flexible, space-efficient I/O architectures for integrated circuits simplify circuit design and shorten design times. In one aspect, cells for power supply pads are eliminated, in part by locating ESD protection circuitry for these pads underneath the pads themselves, leaving only signal I/O buffers. Pads coupled to the signal I/O buffers may be defined as either signal I/O pads or power supply pads in accordance with customization circuitry. Customization circuitry also provides for flexible bank architectures, where signal I/O buffers within a bank share power supply requirements that may be different from power supply requirements of signal I/O buffers of another bank. The number of banks and the number of signal I/O buffers belonging to each bank is flexibly defined. Customization circuitry also provides for flexible pad options, whereby the IC pads may be configured for different packaging technology, for example, for wire bonding for flip-chip bonding, or for other types of bonding.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: July 26, 2016
    Assignee: Baysand Inc.
    Inventors: Jonathan C Parks, Yin Hao Liew, Kok Seong Lee, Salah M Werfelli
  • Patent number: 9166593
    Abstract: Flexible, space-efficient I/O architectures for integrated circuits simplify circuit design and shorten design times. In one aspect, cells for power supply pads are eliminated, in part by locating ESD protection circuitry for these pads underneath the pads themselves, leaving only signal I/O buffers. Pads coupled to the signal I/O buffers may be defined as either signal I/O pads or power supply pads in accordance with customization circuitry. Customization circuitry also provides for flexible bank architectures, where signal I/O buffers within a bank share power supply requirements that may be different from power supply requirements of signal I/O buffers of another bank. The number of banks and the number of signal I/O buffers belonging to each bank is flexibly defined. Customization circuitry also provides for flexible pad options, whereby the IC pads may be configured for different packaging technology, for example, for wire bonding for flip-chip bonding, or for other types of bonding.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: October 20, 2015
    Assignee: Baysand Inc.
    Inventors: Jonathan C Park, Yin Hao Liew, Kok Seong Lee, Salah M Werfelli
  • Patent number: 9166594
    Abstract: Flexible, space-efficient I/O architectures for integrated circuits simplify circuit design and shorten design times. In one aspect, cells for power supply pads are eliminated, in part by locating ESD protection circuitry for these pads underneath the pads themselves, leaving only signal I/O buffers. Pads coupled to the signal I/O buffers may be defined as either signal I/O pads or power supply pads in accordance with customization circuitry. Customization circuitry also provides for flexible bank architectures, where signal I/O buffers within a bank share power supply requirements that may be different from power supply requirements of signal I/O buffers of another bank. The number of banks and the number of signal I/O buffers belonging to each bank is flexibly defined. Customization circuitry also provides for flexible pad options, whereby the IC pads may be configured for different packaging technology, for example, for wire bonding for flip-chip bonding, or for other types of bonding.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: October 20, 2015
    Assignee: Baysand Inc.
    Inventors: Jonathan C Parks, Yin Hao Liew, Kok Seong Lee, Salah M Werfelli
  • Patent number: 8773163
    Abstract: Flexible, space-efficient I/O architectures for integrated circuits simplify circuit design and shorten design times. In one aspect, cells for power supply pads are eliminated, in part by locating ESD protection circuitry for these pads underneath the pads themselves, leaving only signal I/O buffers. Pads coupled to the signal I/O buffers may be defined as either signal I/O pads or power supply pads in accordance with customization circuitry. Customization circuitry also provides for flexible bank architectures, where signal I/O buffers within a bank share power supply requirements that may be different from power supply requirements of signal I/O buffers of another bank. The number of banks and the number of signal I/O buffers belonging to each bank is flexibly defined. Customization circuitry also provides for flexible pad options, whereby the IC pads may be configured for different packaging technology, for example, for wire bonding for flip-chip bonding, or for other types of bonding.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: July 8, 2014
    Assignee: Baysand Inc.
    Inventors: Jonathan C Park, Yin Hao Liew, Kok Seong Lee, Salah M Werfelli