Patents by Inventor Koki Imamura

Koki Imamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7282965
    Abstract: The signal detection circuit of the present invention includes: a comparison section for comparing the absolute value of a voltage of an input differential signal with a threshold voltage corresponding to a first detection level adjustment signal to detect presence/absence of an input signal and outputting a detection signal indicating the detection result; a threshold adjustment control section for generating the first detection level adjustment signal in response to the detection signal and outputting the generated signal; and a detection section for detecting whether or not the level of the detection signal changes repeatedly.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: October 16, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuya Hatooka, Shoichi Yoshizaki, Koki Imamura
  • Publication number: 20070069768
    Abstract: The signal detection circuit of the present invention includes: a comparison section for comparing the absolute value of a voltage of an input differential signal with a threshold voltage corresponding to a first detection level adjustment signal to detect presence/absence of an input signal and outputting a detection signal indicating the detection result; a threshold adjustment control section for generating the first detection level adjustment signal in response to the detection signal and outputting the generated signal; and a detection section for detecting whether or not the level of the detection signal changes repeatedly.
    Type: Application
    Filed: September 29, 2005
    Publication date: March 29, 2007
    Inventors: Kazuya Hatooka, Shoichi Yoshizaki, Koki Imamura
  • Patent number: 7135897
    Abstract: A clock resynchronizer includes a write circuit and a read circuit. The write circuit stores input data in accordance with a first clock associated with the input data. The read circuit outputs data to be output out of the data stored in the write circuit, in accordance with a second clock. The read circuit also outputs a signal acquisition permitting signal indicating that the data to be output is valid. The read circuit outputs no signal acquisition permitting signal when the data to be output is not output.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: November 14, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Koki Imamura
  • Publication number: 20050062525
    Abstract: A clock resynchronizer includes a write circuit and a read circuit. The write circuit stores input data in accordance with a first clock associated with the input data. The read circuit outputs data to be output out of the data stored in the write circuit, in accordance with a second clock. The read circuit also outputs a signal acquisition permitting signal indicating that the data to be output is valid. The read circuit outputs no signal acquisition permitting signal when the data to be output is not output.
    Type: Application
    Filed: September 21, 2004
    Publication date: March 24, 2005
    Inventor: Koki Imamura