Patents by Inventor Koki Otake

Koki Otake has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8490857
    Abstract: A reflow apparatus, where formic acid is used for cleaning a surface of a solder electrode on a processing target, is disclosed. The reflow apparatus includes a processing chamber, a formic acid introduction mechanism for supplying an atmosphere gas containing formic acid to the processing chamber, and a shielding member that is made of a material having corrosion resistance against formic acid. The shielding member is arranged between a reflow processing section of the processing chamber and an inner wall of the processing chamber. In place of or in addition to the shielding member, the reflow apparatus may include a heater for decomposing residual formic acid.
    Type: Grant
    Filed: March 31, 2012
    Date of Patent: July 23, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Hiroyuki Matsui, Hirohisa Matsuki, Koki Otake
  • Patent number: 8336756
    Abstract: A reflow apparatus, where formic acid is used for cleaning a surface of a solder electrode on a processing target, is disclosed. The reflow apparatus includes a processing chamber, a formic acid introduction mechanism for supplying an atmosphere gas containing formic acid to the processing chamber, and a shielding member that is made of a material having corrosion resistance against formic acid. The shielding member is arranged between a reflow processing section of the processing chamber and an inner wall of the processing chamber. In place of or in addition to the shielding member, the reflow apparatus may include a heater for decomposing residual formic acid.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: December 25, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Hiroyuki Matsui, Hirohisa Matsuki, Koki Otake
  • Publication number: 20120187181
    Abstract: A reflow apparatus, where formic acid is used for cleaning a surface of a solder electrode on a processing target, is disclosed. The reflow apparatus includes a processing chamber, a formic acid introduction mechanism for supplying an atmosphere gas containing formic acid to the processing chamber, and a shielding member that is made of a material having corrosion resistance against formic acid. The shielding member is arranged between a reflow processing section of the processing chamber and an inner wall of the processing chamber. In place of or in addition to the shielding member, the reflow apparatus may include a heater for decomposing residual formic acid.
    Type: Application
    Filed: March 31, 2012
    Publication date: July 26, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Hiroyuki MATSUI, Hirohisa Matsuki, Koki Otake
  • Publication number: 20070099411
    Abstract: A reflow apparatus, where formic acid is used for cleaning a surface of a solder electrode on a processing target, is disclosed. The reflow apparatus includes a processing chamber, a formic acid introduction mechanism for supplying an atmosphere gas containing formic acid to the processing chamber, and a shielding member that is made of a material having corrosion resistance against formic acid. The shielding member is arranged between a reflow processing section of the processing chamber and an inner wall of the processing chamber. In place of or in addition to the shielding member, the reflow apparatus may include a heater for decomposing residual formic acid.
    Type: Application
    Filed: February 24, 2006
    Publication date: May 3, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Hiroyuki Matsui, Hirohisa Matsuki, Koki Otake
  • Patent number: 6732911
    Abstract: There is provided a chamber open to the outside through openings through which a solder-adhered object is passed and the chamber having a heating/melting area, a carrying mechanism for carrying the solder-adhered object into the heating/melting area, a formic-acid supplying means for supplying a formic acid into the heating/melting area, an exhausting means for exhausting a gas from the heating/melting area and its neighboring area to create a lower pressure area in the heating/melting area as compared to the pressure of outside the chamber, heating means for heating directly or indirectly the solder-adhered object in the heating/melting area, and an air-stream suppressing means for disturbing a gas flow between the heating/melting area and the carrying areas.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: May 11, 2004
    Assignee: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Hiroyuki Matsui, Eiji Yoshida, Takao Ohno, Koki Otake, Akiyo Mizutani, Motoshu Miyajima, Masataka Mizukoshi, Eiji Watanabe
  • Patent number: 6528346
    Abstract: First and second ball forming plates are prepared. The cavities of the first plate and the cavities of the second plate 20 are filled with solder paste, respectively. The first plate and the second plate are placed in a facing relationship to each other and heated to form metal balls each of which corresponds to the total metal components of the solder paste in one cavity of the first plate and one cavity in the second plate. The metal balls are formed in the cavities of the lower plate 10. The metal balls are transferred from the cavities of the first plate to a device on which bumps are to be formed.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: March 4, 2003
    Assignee: Fujitsu Limited
    Inventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi
  • Publication number: 20020130164
    Abstract: There are provided a chamber having openings which are opened to an outer air and through which a solder-adhered object w is passed and having a heating/melting area and carrying areas arranged adjacent to the heating/melting area, a carrying mechanism for carrying the solder-adhered object w into the heating/melting area, a formic-acid supplying means for supplying a formic acid into the heating/melting area, an exhausting means for exhausting a gas from the heating/melting area and its neighboring area to lower a pressure in the heating/melting area rather than an outer air, heating means for heating directly or indirectly the solder-adhered object w in the heating/melting area, and air-stream suppressing means for disturbing a gas flow between the heating/melting area and the carrying areas.
    Type: Application
    Filed: October 5, 2001
    Publication date: September 19, 2002
    Applicant: Fujitsu Limited
    Inventors: Hirohisa Matsuki, Hiroyuki Matsui, Eiji Yoshida, Takao Ohno, Koki Otake, Akiyo Mizutani, Motoshu Miyajima, Masataka Mizukoshi, Eiji Watanabe
  • Patent number: 6319810
    Abstract: Method for forming solder bumps on a first member such as a semiconductor chip having electrode pads formed thereon. A flat plate having holes is prepared and the holes are filled with solder paste by squeezing. The flat plate is then overlapped with the first member with the flat plate above the first plate. The flat plate and the first member are heated to a temperature higher than the melting point of the solder alloy in the solder paste. Therefore, solder bumps having identical sizes and uniform structures can be obtained.
    Type: Grant
    Filed: June 6, 1996
    Date of Patent: November 20, 2001
    Assignee: Fujitsu Limited
    Inventors: Masayuki Ochiai, Yasuo Yamagishi, Ichiro Yamaguchi, Masahiro Yoshikawa, Koki Otake, Masataka Mizukoshi, Yuuji Watanabe
  • Publication number: 20010018263
    Abstract: First and second ball forming plates are prepared. The cavities of the first plate and the cavities of the second plate 20 are filled with solder paste, respectively. The first plate and the second plate are placed in a facing relationship to each other and heated to form metal balls each of which corresponds to the total metal components of the solder paste in one cavity of the first plate and one cavity in the second plate. The metal balls are formed in the cavities of the lower plate 10. The metal balls are transferred from the cavities of the first plate to a device on which bumps are to be formed.
    Type: Application
    Filed: December 28, 2000
    Publication date: August 30, 2001
    Inventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi
  • Patent number: 6271110
    Abstract: First and second ball forming plates are prepared. The cavities of the first plate and the cavities of the second plate 20 are filled with solder paste, respectively. The first plate and the second plate are placed in a facing relationship to each other and heated to form metal balls each of which corresponds to the total metal components of the solder paste in one cavity of the first plate and one cavity in the second plate. The metal balls are formed in the cavities of the lower plate 10. The metal balls are transferred from the cavities of the first plate to a device on which bumps are to be formed.
    Type: Grant
    Filed: July 17, 1998
    Date of Patent: August 7, 2001
    Assignee: Fujitsu Limited
    Inventors: Ichiro Yamaguchi, Koki Otake, Masahiro Yoshikawa
  • Patent number: 6090301
    Abstract: A method for fabricating a bump forming plate member by which bumps can be formed on an electronic component. A mask is formed on a surface of a crystalline plate, and the crystalline plate is subjected to anisotropic etching to form a plurality of grooves. The crystalline plate is also subjected to isotropic etching to deepen the grooves. The method can further includes additional anisotropic and isotropic etchings. Also, a method for fabricating a metallic bump forming plate member is disclosed. This method uses the above described crystalline plate having the grooves, and includes fabrication of a replica using the crystalline plate as an original, and fabrication of a metallic bump forming plate member using the replica as an original.
    Type: Grant
    Filed: May 19, 1997
    Date of Patent: July 18, 2000
    Assignee: Fujitsu Limited
    Inventors: Masataka Mizukoshi, Ichiro Yamaguchi, Masahiro Yoshikawa, Koki Otake, Junichi Kasai
  • Patent number: 6025258
    Abstract: A method for fabricating solder bumps onto a semiconductor chip. A solder ball forming member having a flat surface and a plurality of cavities arranged on the flat surface in a predetermined pattern is prepared. The cavities are then filled with a solder paste, and the solder ball forming member is heated to a temperature higher than the melting point of the solder so that the molten solder powder in the solder paste form solder balls due to surface tension. The semiconductor chip is then moved toward the solder ball forming member to transfer the heated solder balls from the solder ball forming member to the semiconductor chip.
    Type: Grant
    Filed: August 17, 1995
    Date of Patent: February 15, 2000
    Assignee: Fujitsu Limited
    Inventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi
  • Patent number: 6022759
    Abstract: A semiconductor device includes a semiconductor element, a semiconductor device base member having an element mounting portion on which the semiconductor element is mounted, external connection terminals provided on the semiconductor device base member and electrically connected to the semiconductor element, and a resin sealing the semiconductor element. The semiconductor device base member includes a base part and lead parts supported by the base part. The lead parts are electrically connected to the external connection terminals. The semiconductor device base member has bent portions in which the lead parts are located on outer sides of the semiconductor device base member. The bent portions are located in edge portions of the semiconductor device base member.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: February 8, 2000
    Assignees: Fujitsu Limited, Fujitsu Automation Limited
    Inventors: Masaaki Seki, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Lim Cheang Hai, Koki Otake, Susumu Abe, Junichi Kasai, Masao Sakuma, Yoshimi Suzuki, Yasuhiro Shinma
  • Patent number: 5920117
    Abstract: A semiconductor device includes a board having a lower surface, a container part created in the board, external-connection nodes provided on the lower surface of the board, a supporting member provided inside the container part and secured by the board, a semiconductor chip secured on the supporting member and electrically connected with the external-connection nodes, and a sealing resin fully filling the container part so as to completely cover the semiconductor chip.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: July 6, 1999
    Assignee: Fujitsu Limited
    Inventors: Michio Sono, Masashi Takenaka, Masanori Yoshimoto, Tsuyoshi Aoki, Ichiro Yamaguchi, Koki Otake
  • Patent number: 5747874
    Abstract: A semiconductor device includes a semiconductor element, a semiconductor device base member having an element mounting portion on which the semiconductor element is mounted, external connection terminals provided on the semiconductor device base member and electrically connected to the semiconductor element, and a resin sealing the semiconductor element. The semiconductor device base member includes a base part and lead parts supported by the base part. The lead parts are electrically connected to the external connection terminals. The semiconductor device base member has bent portions in which the lead parts are located on outer sides of the semiconductor device base member. The bent portions are located in edge portions of the semiconductor device base member.
    Type: Grant
    Filed: September 18, 1995
    Date of Patent: May 5, 1998
    Assignees: Fujitsu Limited, Fujitsu Automation Limited
    Inventors: Masaaki Seki, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Lim Cheang Hai, Koki Otake, Susumu Abe, Junichi Kasai, Masao Sakuma, Yoshimi Suzuki, Yasuhiro Shinma
  • Patent number: 5643831
    Abstract: A method for fabricating a semiconductor device using a solder ball forming plate having cavities. The plate is made from a silicon plate having a flat surface in a <110> crystallographic plane, and an orientation flat in a <1-11> crystallographic plane. The cavities are formed on the flat surface of the plate by etching, using a mask having openings in the shape of rhombus arranged such that one side of the rhombus is generally parallel to the <1-11> crystallographic plane. As a result, the cavities having wedge-shaped bottom are formed. The cavities are then filled with a solder paste and are heated to form solder balls in the cavities while the plate in an inclined position. The solder balls are then transferred from the plate to a semiconductor chip.
    Type: Grant
    Filed: October 24, 1995
    Date of Patent: July 1, 1997
    Assignee: Fujitsu Limited
    Inventors: Masayuki Ochiai, Hidefumi Ueda, Michio Sono, Ichiro Yamaguchi, Kazuhiko Mitobe, Koki Otake, Junichi Kasai, Nobuo Kamehara, Yasuo Yamagishi, Masataka Mizukoshi, Yutaka Yamada, Susumu Abe