Abstract: An object of the present invention is to largely reduce a period required for a layout design of a semiconductor integrated circuit device by simplifying a hierarchical layout process. It is necessary to couple a signal line between a circuit belonging to a top and a signal terminal of a block, and there is such an inadequate situation that the signal line cannot be coupled to a predetermined location of the signal terminal of the block or the signal line needs to be largely detoured depending on congestion conditions of the other signal lines in the block and the signal lines of the top coupled to the other blocks. Accordingly, location information of the signal terminal is deleted before the signal line is coupled, so that the signal line can be coupled irrespective of the location information of the signal terminal of the block.

Abstract: There is provided a semiconductor device design method capable of achieving optimal layout design. For example, from the entire semiconductor device, a plurality of seeds which are flip-flops are set uniformly. In the first trace, the effective range (node) of each seed is expanded in parallel so that the respective objective function values (including difficulty levels of timing convergence) of the nodes are equalized. Then, in the first merge, adjacent seeds are merged as appropriate so that the number of nodes decreases to a certain rate, and a total cost containing the difficulty level of each node and the difficulty level of circuits remaining in the entire semiconductor device is calculated. Until the total cost worsens, as in the first trace and merge, the second trace and merge, the third trace and merge, . . . are performed. Based on optimal division units thereby determined, floorplan, division layout, and the like are performed.

Abstract: An object of the present invention is to largely reduce a period required for a layout design of a semiconductor integrated circuit device by simplifying a hierarchical layout process. It is necessary to couple a signal line between a circuit belonging to a top and a signal terminal of a block, and there is such an inadequate situation that the signal line cannot be coupled to a predetermined location of the signal terminal of the block or the signal line needs to be largely detoured depending on congestion conditions of the other signal lines in the block and the signal lines of the top coupled to the other blocks. Accordingly, location information of the signal terminal is deleted before the signal line is coupled, so that the signal line can be coupled irrespective of the location information of the signal terminal of the block.