Abstract: Semiconductor device analysis is improved through the distinguishing of gate oxide failures from other non-oxide failures. According to an example embodiment of the present invention, oxide failures are distinguished from non-oxide shorts between a gate and source/drain region in a semiconductor device during gate oxide analysis. An electrical characteristic that exhibits a first response to an oxide failure and a second response to a non-oxide failure is detected and used to detect the nature of a short in the device. This analysis is easily incorporated into other tests, such as the Voltage Ramp Dielectric Breakdown test (VRDB), and is particularly useful for improving the ability to detect and analyze defects without necessarily viewing the defect or destroying the device.