Patents by Inventor Kollengode S. Narayanan
Kollengode S. Narayanan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7090554Abstract: A flat-panel display is fabricated by a process in which a spacer (24) having a rough face (54 or 56) is positioned between a pair of plate structure (20 and 22). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as providing suitable depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92) along the spacer's face.Type: GrantFiled: June 24, 2003Date of Patent: August 15, 2006Assignees: Candescent Technologies Corporation, Candescent Intellectual Property Services, Inc., Advanced Technology Materials, Inc.Inventors: Roger W. Barton, Kollengode S. Narayanan, Bob L. Mackey, John M. Macaulay, George B. Hopple, Donald R. Schropp, Jr., Michael J. Nystrom, Sudhakar Gopalakrishnan, Shiyou Pei, Xueping Xu
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Patent number: 6861798Abstract: The present invention provides a spacer assembly which is tailored to provide a secondary electron emission coefficient of approximately 1 for the spacer assembly when the spacer assembly is subjected to flat panel display operating voltages. The present invention further provides a spacer assembly which accomplishes the above achievement and which does not degrade severely when subjected to electron bombardment. The present invention further provides a spacer assembly which accomplishes both of the above-listed achievements and which does not significantly contribute to contamination of the vacuum environment of the flat panel display or be susceptible to contamination that may evolve within the tube. Specifically, in one embodiment, the present invention is comprised of a spacer structure which has a specific secondary electron emission coefficient function associated therewith.Type: GrantFiled: January 28, 2000Date of Patent: March 1, 2005Assignees: Candescent Technologies Corporation, Candescent Intellectual Property Services, Inc.Inventors: Lawrence S. Pan, Donald R. Schropp, Jr., Vasil M. Chakarov, John K. O'Reilly, George B. Hopple, Christopher J. Spindt, Roger W. Barton, Michael J. Nystrom, Ramamoorthy Ramesh, James C. Dunphy, Shiyou Pei, Kollengode S. Narayanan
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Patent number: 6617772Abstract: A flat-panel display contains a pair of plate structure (20 and 22) separated by a spacer (24) having a rough face (54 or 56). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92). Various techniques are presented for manufacturing the display, including the rough-faced spacer.Type: GrantFiled: December 11, 1998Date of Patent: September 9, 2003Assignees: Candescent Technologies Corporation, Candescent Intellectual Property Services, Inc., Advanced Technology Materials, IncInventors: Roger W. Barton, Kollengode S. Narayanan, Bob L. Mackey, John M. Macaulay, George B. Hopple, Donald R. Schropp, Jr., Michael J. Nystrom, Sudhakar Gopalakrishnan, Shiyou Pei, Xueping Xu
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Patent number: 6596618Abstract: The present invention provides a method of forming solder bumps on a semiconductor chip, for flip-chip bonding, having increased height to improve the solder joint reliability of the flip-chip bonded chip and carrier assembly. According to the present invention, a second layer of solder structure is deposited on to each of the solder bump precursor structures formed by a first layer of solder structure to increase the solder-bump volume, which results in solder bumps with increased height.Type: GrantFiled: December 7, 2001Date of Patent: July 22, 2003Assignee: Altera CorporationInventors: Kollengode S. Narayanan, Mohammad Eslamy
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Patent number: 6571464Abstract: Methods and structures are provided which support spacer walls in a position which facilitates installation of the spacer walls between a faceplate structure and a backplate structure of a flat panel display. In one embodiment, spacer feet are formed at opposing ends of the spacer wall. These spacer feet can be formed of materials such as ceramic, glass and/or glass frit. The spacer feet support the corresponding spacer wall on the faceplate (or backplate) structure. Tacking electrodes can be provided on the faceplate (or backplate) structure to assert an electrostatic force on the spacer feet, thereby holding the spacer feet in place during installation of the spacer wall. The spacer wall can be mechanically and/or thermally expanded prior to attaching both ends of the spacer wall to the faceplate (or backplate) structure. The spacer wall is then allowed to contract, thereby introducing tension into the spacer wall which tends to straighten any inherent waviness in the spacer wall.Type: GrantFiled: April 26, 2001Date of Patent: June 3, 2003Assignees: Candescent Technologies Corporation, Candescent Intellectual Property Services, Inc.Inventors: Theodore S. Fahlen, Alfred S. Conte, Robert M. Duboc, Jr., George B. Hopple, John K. O'Reilly, Vasil M. Chakarov, Robert L. Marion, Steve T. Cho, Robert G. Neimeyer, Jennifer Y. Sun, David L. Morris, Christopher J. Spindt, Kollengode S. Narayanan
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Publication number: 20010032735Abstract: Methods and structures are provided which support spacer walls in a position which facilitates installation of the spacer walls between a faceplate structure and a backplate structure of a flat panel display. In one embodiment, spacer feet are formed at opposing ends of the spacer wall. These spacer feet can be formed of materials such as ceramic, glass and/or glass frit. The spacer feet support the corresponding spacer wall on the faceplate (or backplate) structure. Tacking electrodes can be provided on the faceplate (or backplate) structure to assert an electrostatic force on the spacer feet, thereby holding the spacer feet in place during installation of the spacer wall. The spacer wall can be mechanically and/or thermally expanded prior to attaching both ends of the spacer wall to the faceplate (or backplate) structure. The spacer wall is then allowed to contract, thereby introducing tension into the spacer wall which tends to straighten any inherent waviness in the spacer wall.Type: ApplicationFiled: April 26, 2001Publication date: October 25, 2001Inventors: Theodore S. Fahlen, Alfred S. Conte, Robert M. Duboc, George B. Hopple, John K. O'Reilly, Vasil M. Chakarov, Robert L. Marion, Steve T. Cho, Robert G. Neimeyer, Jennifer Y. Sun, David L. Morris, Christopher J. Spindt, Kollengode S. Narayanan
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Patent number: 6278066Abstract: A spacer (100 or 600/1000A/1000B) situated between a faceplate structure (301) and a backplate structure (302) of a flat panel display is configured to be self standing. In one implementation, a pair of spacer feet (111 or 113 and 112 or 114) are located over the same face surface, or over opposite face surfaces, of a spacer wall (101) near opposite ends of the wall. An edge electrode (121 or 122) is located over an edge surface of the spacer adjacent to the faceplate structure or the backplate structure. In another implementation, a spacer clip (1000A or 1000B) clamps opposite face surfaces of a spacer wall (600) largely at one end of the wall.Type: GrantFiled: December 20, 1996Date of Patent: August 21, 2001Assignee: Candescent Technologies CorporationInventors: Theodore S. Fahlen, Alfred S. Conte, Robert M. Duboc, Jr., George B. Hopple, John K. O'Reilly, Vasil M. Chakarov, Robert L. Marion, Steve T. Cho, Robert G. Neimeyer, Jennifer Y. Sun, David L. Morris, Christopher J. Spindt, Kollengode S. Narayanan
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Patent number: 6200181Abstract: Walls for a flat panel display and a method for forming walls for a flat panel display that have improved thermal conductivity and decreased thermal coefficient of resistivity. In one embodiment, walls are fabricated using alumina, molybdenum, and titania. These oxide materials (alumina and titania) are mixed with the a metal oxide and cast so as to form thin sheets of material that are then heated. The heating process reduces the metal oxides to their metallic state. The resulting thin sheets of material are then cut to form walls. This produces walls having a higher thermal conductivity than prior art walls. In addition, the thermal coefficient of resistivity of the resulting material is significantly lower than that of prior art materials used for making walls. A flat panel display having the walls of the present invention does not exhibit non-illuminated regions of the visible display due to wall-related thermal effects.Type: GrantFiled: July 31, 1998Date of Patent: March 13, 2001Assignee: Candescent Technologies CorporationInventors: Kollengode S. Narayanan, George B. Hopple, Theodore S. Fahlen, John P. Klatt
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Patent number: 6126505Abstract: A composite sealing frame structure and a method for forming a composite sealing frame structure. In one embodiment, a rigid backbone component is provided with a first surface and a second surface. A first sealing material is disposed on the first surface of the rigid backbone component. A second sealing material is disposed on the second surface of the rigid backbone component. The first sealing material is adapted to seal the rigid backbone component to a first portion of a flat panel display. The second sealing material is adapted to seal the rigid backbone component to a second portion of a flat panel display such that the first portion and the second portion of the flat panel display are secured together by the rigid backbone component and the first and the second sealing material.Type: GrantFiled: November 30, 1998Date of Patent: October 3, 2000Assignee: Candescent Technologies CorporationInventors: Kollengode S. Narayanan, Raymond G. Capek, Robert J. Lira, Theodore S. Fahlen
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Patent number: 6113450Abstract: Seal material bars and methods for forming seal material bars, a seal material frame and a method for forming a seal material frame, and a method for forming a flat panel display. Bars of seal material are made by extruding a mixture of glass frit and organic compound. In one embodiment, the glass frit bars have joining features formed in them. Ceramic material is also extruded so as to form seal material bars. The seal material bars are placed between the backplate and the faceplate and glass frit slurry is placed between adjoining seal material bars. Alternatively, seal material bars having joining features are used by mating joining features of adjoining seal material bars. A heating step melts the seal material so as to form a sealed interior region. Alternatively, the bars of seal material are used to form a seal material frame that is disposed between the faceplate and the backplate.Type: GrantFiled: May 14, 1998Date of Patent: September 5, 2000Assignee: Candescent Technologies CorporationInventors: Kollengode S. Narayanan, Masyood M. Akhtar, Raymond G. Capek, James G. Richardson, Theodore S. Fahlen, Dmitriy Krupetskiy, Valeriy Karmanov, Al L. Urquhart, Darrel J. Guidry, Lawrence Serrano