Patents by Inventor Kong Chong So

Kong Chong So has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DMOS transistors with diffusion merged body regions manufactured with reduced number of masks and enhanced ruggedness
    Patent number: 5973361
    Abstract: A new transistor cell is disclosed in this invention which is formed in a semiconductor substrate with a drain region of a first conductivity type formed at a bottom surface of the substrate. The DMOS cell includes a polysilicon layer constituting a gate supported on a top surface of the substrate, the gate surrounding and defining an outer boundary of the transistor cell having a removed polysilicon opening disposed substantially in a central portion of the cell. The DMOS cell further includes a source region of the first conductivity disposed in the substrate near edges of the removed polysilicon opening with a portion extends underneath the gate. The DMOS cell further includes a body region of a second conductivity type disposed in the substrate occupying an entire region under the removed polysilicon opening thus encompassing the source region and having a portion extends underneath the gate.
    Type: Grant
    Filed: September 15, 1997
    Date of Patent: October 26, 1999
    Assignee: Magepower Semiconductor Corporation
    Inventors: Fwu-Iuan Hshieh, Kong Chong So, Danny Chi Nim
  • Method for device ruggedness improvement and on-resistance reduction for power MOSFET achieved by novel source contact structure
    Patent number: 5930630
    Abstract: The invention discloses method for fabricating a MOSFET on a substrate to improve device ruggedness.
    Type: Grant
    Filed: July 23, 1997
    Date of Patent: July 27, 1999
    Assignee: MegaMOS Corporation
    Inventors: Fwu-Iuan Hshieh, Kong Chong So, Danny Chi Nim