Patents by Inventor Konomu Ohki

Konomu Ohki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5686364
    Abstract: A method for producing for a SOI type bonded substrate for semiconductor integrated circuits which has a void areal ratio which approaches or is equal to zero %, when heat treated at temperatures on the order of 1250.degree. C. The method involves: superimposing a Si single crystal wafer having a main surface of which is covered by a Si polycrystal layer, beneath which Si single crystal islands are formed on the main surface and are isolated from each other by V grooves with interposition of a dielectric film, which V grooves are filled up by the Si polycrystal layer, and a support made from Si material between the Si polycrystal layer and a surface of the support with a dielectrically insulating layer sandwiched therebetween; and conducting heat treatment of the superimposed Si single crystal wafer and the support to effect bonding therebetween.
    Type: Grant
    Filed: September 19, 1995
    Date of Patent: November 11, 1997
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Konomu Ohki, Akio Kanai, Shinji Tanaka
  • Patent number: 5336634
    Abstract: A dielectrically isolated substrate is comprised of a single-crystal silicon substrate or bond substrate and a single-crystal silicon substrate or base substrate bonded together into a composite structure. The bond substrate has a (110) plane as a main crystal plane and is provided with vertically walled moats and substantially squared islands positioned adjacent to the moats. The moats and islands result from anisotropic etching using a specific mask pattern. Also disclosed is a process for producing the composite structure.
    Type: Grant
    Filed: March 2, 1993
    Date of Patent: August 9, 1994
    Assignee: Shin-Etsu Handotui Co., Ltd.
    Inventors: Masatake Katayama, Makoto Sato, Yutaka Ohta, Mitsuru Sugita, Konomu Ohki
  • Patent number: 5240883
    Abstract: A thin Silicon film On Insulator (SOI) material fabricating method which is capable of providing a very high thickness uniformity of the silicon film, a process simplification and a considerable reduction of processing cost is disclosed, in which a silicon oxide film is formed on one or both of a p-type silicon bond wafer and a silicon base wafer, then the two wafers are bonded together through the silicon oxide film, subsequently a fixed positive charge is induced in the silicon oxide film to form a n-type inversion layer in the p-type silicon bond wafer adjacent to an interface between the p-type silicon bond wafer and the silicon oxide film layer, and thereafter a chemical etching is effected while applying a positive voltage to the p-type silicon bond wafer so that an etch-stop is made at an interface between a depletion layer including the n-type inversion layer and the p-type layer.
    Type: Grant
    Filed: February 25, 1992
    Date of Patent: August 31, 1993
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Takao Abe, Masatake Katayama, Akio Kanai, Konomu Ohki, Masatake Nakano
  • Patent number: 5183783
    Abstract: Single crystal silicon islands in a dielectric-separation substrate are separated completely and finished in a uniform thickness by preparatorily denuding a single crystal silicon substrate of a warpage suffered to occur therein.This dielectric-separation substrate is produced by a method which comprises forming a thermal oxide film on a single crystal silicon substrate having grooves incised in advance therein, then forming an irreversibly thermally shrinkable film on the rear surface of said single crystal silicon substrate prior to depositing a polycrystalline silicon thereon, then depositing a polycrystalline silicon on said single crystal silicon substrate, and thereafter grinding said single crystal silicon substrate in conjunction with said irreversibly thermally shrinkable film.
    Type: Grant
    Filed: December 23, 1991
    Date of Patent: February 2, 1993
    Assignee: Shin-Etsu Handotai Co., Ltd
    Inventors: Yutaka Ohta, Konomu Ohki, Masatake Katayama
  • Patent number: 5124274
    Abstract: After the separating grooves has been formed, the polycrystalline silicon deposited as bonded to the single crystal substrate as a supporting base, and the polycrystalline silicon layer ground and polished until the oxide film in the area other than the separating grooves is exposed, the present invention etches the polycrystalline silicon layer on the separating grooves with mixed acid composed of hydrofluoric acid and nitric acid until its thickness equals that of the separating oxide film and subsequently removes the oxide film in the area other than the separating grooves with hydrofluoric acid, As a result, the otherwise inevitable occurrence of projections of polycrystalline silicon can be precluded. When the dielectric-separation substrate obtained by the present invention is used in manufacturing a semiconductor device, therefore, the occurrence of particles due to the chipping of the projections of polycrystalline silicon and the breakage of distributed wires in the produced device can be prevented.
    Type: Grant
    Filed: November 14, 1991
    Date of Patent: June 23, 1992
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Konomu Ohki, Yutaka Ohta, Masatake Katayama