Patents by Inventor Konosuke Murakami

Konosuke Murakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9519009
    Abstract: A prober includes: a wafer chuck having a conductive support surface; a movement rotation mechanism which moves and rotates the wafer chuck; a head stage which holds a probe holding portion; a stage member which has a conductive stage surface that is formed in parallel to the support surface and electrically connected with the support surface, and can move integrally with the wafer chuck; and a contactor which is fixed to a position facing the stage member and whose tip can electrically come into contact with the stage surface, wherein the stage member is separated from the wafer chuck as a separate body, and the stage surface and the support surface are electrically connected through a wiring member; and a back-surface electrode of a chip is electrically connected with a tester through the wafer chuck, a wiring, the stage member and the contactor.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: December 13, 2016
    Assignee: Tokyo Seimitsu Co., Ltd.
    Inventors: Konosuke Murakami, Toshiro Mori, Yuji Shigesawa, Kazuhisa Aoki, Akira Yamaguchi
  • Publication number: 20150137842
    Abstract: A prober includes: a wafer chuck having a conductive support surface; a movement rotation mechanism which moves and rotates the wafer chuck; a head stage which holds a probe holding portion; a stage member which has a conductive stage surface that is formed in parallel to the support surface and electrically connected with the support surface, and can move integrally with the wafer chuck; and a contactor which is fixed to a position facing the stage member and whose tip can electrically come into contact with the stage surface, wherein the stage member is separated from the wafer chuck as a separate body, and the stage surface and the support surface are electrically connected through a wiring member; and a back-surface electrode of a chip is electrically connected with a tester through the wafer chuck, a wiring, the stage member and the contactor.
    Type: Application
    Filed: November 20, 2014
    Publication date: May 21, 2015
    Inventors: Konosuke Murakami, Toshiro Mori, Yuji Shigesawa, Kazuhisa Aoki, Akira Yamaguchi
  • Patent number: 7129507
    Abstract: The invention is a method for detecting float or peel of semiconductor chips arranged in X and Y axes directions diced and bonded to a dicing tape on a stage. The method includes detecting float or peel of the semiconductor chips in a respective horizontal or longitudinal row arranged in the X or Y axis direction; moving the stage in the X axis direction, the Y axis direction, a Z axis direction, and a rotational direction around the Z axis for aligning the stage with a position detection unit for detecting positions of the semiconductor chips in the X axis direction and the Y axis direction; detecting the positions of abnormal semiconductor chips in the respective horizontal or longitudinal row that includes said abnormal semiconductor chips; and specifying the positions of said abnormal semiconductor chips on the X-Y axes.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: October 31, 2006
    Assignee: Tokyo Seimitsu Co., Ltd
    Inventors: Akira Yamamoto, Konosuke Murakami, Yoshio Niki, Takashi Ishimoto, Yutaka Ueda
  • Publication number: 20050173702
    Abstract: The invention includes first detection means (9A) disposed on the side of a stage (2), for detecting float or peel of semiconductor chips (10) inside a horizontal or longitudinal row unit regularly arranged in an X or Y axis direction, and second detection means (9B) disposed above the stage (2), for detecting the positions of the semiconductor chips in a unit horizontal or longitudinal row including the peeling semiconductor chips detected by the first detection means, and specifies the positions of the peeling semiconductor chips on the X-Y coordinate axes among a large number of semiconductor chips regularly arranged in the X and Y axes directions by using the first and second detection means while the stage is being moved in the X and Y axes directions.
    Type: Application
    Filed: February 4, 2005
    Publication date: August 11, 2005
    Inventors: Akira Yamamoto, Konosuke Murakami, Yoshio Niki, Takashi Ishimoto, Yutaka Ueda