Patents by Inventor Konosuke Taki
Konosuke Taki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11336284Abstract: A motor controller system that includes an analog switch multiplexer system is disclosed. Specific implementations include a plurality of field effect transistors (FETs) that may be configured to be operatively coupled with one or more phases of a motor. Each of the plurality of FETs may include a gate, an analog switch multiplexer coupled with each of the gates of the plurality of FETs and with an analog output, and a digital control block coupled with the analog switch multiplexer that may be configured to send a multiplexer select control signal to the analog switch multiplexer in response to receiving a serial peripheral interface signal.Type: GrantFiled: February 2, 2021Date of Patent: May 17, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Konosuke Taki
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Publication number: 20210159901Abstract: A motor controller system that includes an analog switch multiplexer system is disclosed. Specific implementations include a plurality of field effect transistors (FETs) that may be configured to be operatively coupled with one or more phases of a motor. Each of the plurality of FETs may include a gate, an analog switch multiplexer coupled with each of the gates of the plurality of FETs and with an analog output, and a digital control block coupled with the analog switch multiplexer that may be configured to send a multiplexer select control signal to the analog switch multiplexer in response to receiving a serial peripheral interface signal.Type: ApplicationFiled: February 2, 2021Publication date: May 27, 2021Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Konosuke TAKI
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Patent number: 10924116Abstract: A motor controller system that includes an analog switch multiplexer system is disclosed. Specific implementations include a plurality of field effect transistors (FETs) that may be configured to be operatively coupled with one or more phases of a motor. Each of the plurality of FETs may include a gate, an analog switch multiplexer coupled with each of the gates of the plurality of FETs and with an analog output, and a digital control block coupled with the analog switch multiplexer that may be configured to send a multiplexer select control signal to the analog switch multiplexer in response to receiving a serial peripheral interface signal.Type: GrantFiled: November 13, 2019Date of Patent: February 16, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Konosuke Taki
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Patent number: 8115469Abstract: A driver circuit raises an output transistor signal smoothly while suppressing decreases in voltage. A motor driver includes a transistor connected to a buffer of a pre-driver. An external terminal of the motor driver is connected to a regulator to supply first and second transistors with voltage. The gates of the first and second transistors are connected to the drain of the other one of the first and second transistors. The first transistor is connected to a third transistor, which receives an input signal. The second transistor is connected to a fourth transistor, which receives the inverted input signal. The external terminal is connected to the gate of a further transistor. The further transistor has a source connected via a fifth transistor to a buffer, and a drain connected to the regulator.Type: GrantFiled: April 9, 2010Date of Patent: February 14, 2012Assignee: Freescale Semiconductor, Inc.Inventor: Konosuke Taki
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Publication number: 20100277155Abstract: A driver circuit raises an output transistor signal smoothly while suppressing decreases in voltage. A motor driver includes a transistor connected to a buffer of a pre-driver. An external terminal of the motor driver is connected to a regulator to supply first and second transistors with voltage. The gates of the first and second transistors are connected to the drain of the other one of the first and second transistors. The first transistor is connected to a third transistor, which receives an input signal. The second transistor is connected to a fourth transistor, which receives the inverted input signal. The external terminal is connected to the gate of a further transistor. The further transistor has a source connected via a fifth transistor to a buffer, and a drain connected to the regulator.Type: ApplicationFiled: April 9, 2010Publication date: November 4, 2010Applicant: FREESCALE SEMICONDUCTOR, INCInventor: Konosuke TAKI
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Patent number: 7679373Abstract: A trimming circuit, an electronic circuit, and a trimming control system for reducing the risk of failures when perform trimming and for ensuring that a desired device is readily manufactured. A selector, a resistor, and a fuse are connected in series between a power supply and ground. A probe pad for performing probe trimming is connected immediately above the fuse. The selector includes two back-to-back connected n-type MOS transistors. Each n-type MOS transistor has a gate terminal connected to a selector control circuit. A trim sense circuit is arranged at a power supply side of the fuse. The trim sense circuit detects fuse breakage and changes the operation of an element associated with each trimming circuit TC based on the detection.Type: GrantFiled: October 12, 2006Date of Patent: March 16, 2010Assignee: Freescale Semiconductor, Inc.Inventors: Konosuke Taki, Hidetaka Fukazawa
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Publication number: 20100007399Abstract: A pre-driver for driving a high-side transistor of a bridge driver is connected to a bridge driver including first and second drive transistors connected in series between a high voltage power supply and ground. A reference circuit generates a reference voltage that varies depending on the output voltage of the bridge driver. In response to the reference voltage, the regulator circuit generates an internal power supply voltage that is substantially higher than the output voltage by a constant value. A buffer circuit generates a drive voltage for driving the first drive transistor based on the internal power supply voltage and the output voltage.Type: ApplicationFiled: July 10, 2008Publication date: January 14, 2010Applicant: FREESCALE SEMICONDUCTOR, INCInventor: Konosuke Taki
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Patent number: 7635998Abstract: A pre-driver for driving a high-side transistor of a bridge driver is connected to a bridge driver including first and second drive transistors connected in series between a high voltage power supply and ground. A reference circuit generates a reference voltage that varies depending on the output voltage of the bridge driver. In response to the reference voltage, the regulator circuit generates an internal power supply voltage that is substantially higher than the output voltage by a constant value. A buffer circuit generates a drive voltage for driving the first drive transistor based on the internal power supply voltage and the output voltage.Type: GrantFiled: July 10, 2008Date of Patent: December 22, 2009Assignee: Freescale Semiconductor, Inc.Inventor: Konosuke Taki
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Patent number: 7358792Abstract: A discharge device and DC power supply system for preventing erroneous operation of a series regulator. The discharge circuit includes a voltage comparison circuit for comparing input power supply voltage and output power supply voltage of the series regulator. The voltage comparison circuit includes first and second transistors. The collector terminal of the second transistor is connected to the drain terminal of a fourth transistor and to the gate terminal of a fifth transistor. The fifth transistor has a drain terminal, which is connected to the output terminal of the series regulator, and a source terminal, which is grounded. Third and fourth transistors operate when the input power supply voltage is greater than the activation voltage. The drain terminal of the fourth transistor is grounded via a resistor, and the voltage of the fourth transistor is supplied to the gate terminal of the fifth transistor.Type: GrantFiled: August 14, 2006Date of Patent: April 15, 2008Assignee: Freescale Semiconductor, Inc.Inventors: Konosuke Taki, Hidetaka Fukazawa, Shintaroh Murakami
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Publication number: 20070080739Abstract: A trimming circuit, an electronic circuit, and a trimming control system for reducing the risk of failures when perform trimming and for ensuring that a desired device is readily manufactured. A selector, a resistor, and a fuse are connected in series between a power supply and ground. A probe pad for performing probe trimming is connected immediately above the fuse. The selector includes two back-to-back connected n-type MOS transistors. Each n-type MOS transistor has a gate terminal connected to a selector control circuit. A trim sense circuit is arranged at a power supply side of the fuse. The trim sense circuit detects fuse breakage and changes the operation of an element associated with each trimming circuit TC based on the detection.Type: ApplicationFiled: October 12, 2006Publication date: April 12, 2007Applicant: Freescale Semiconductor, Inc.Inventors: Konosuke Taki, Hidetaka Fukazawa
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Publication number: 20070046276Abstract: A discharge device and DC power supply system for preventing erroneous operation of a series regulator. The discharge circuit includes a voltage comparison circuit for comparing input power supply voltage and output power supply voltage of the series regulator. The voltage comparison circuit includes first and second transistors. The collector terminal of the second transistor is connected to the drain terminal of a fourth transistor and to the gate terminal of a fifth transistor. The fifth transistor has a drain terminal, which is connected to the output terminal of the series regulator, and a source terminal, which is grounded. Third and fourth transistors operate when the input power supply voltage is greater than the activation voltage. The drain terminal of the fourth transistor is grounded via a resistor, and the voltage of the fourth transistor is supplied to the gate terminal of the fifth transistor.Type: ApplicationFiled: August 14, 2006Publication date: March 1, 2007Inventors: Konosuke Taki, Hidetaka Fukazawa, Shintaroh Murakami