Abstract: A wireless device includes impedance determination and processing circuitry. The impedance determination circuitry determines load impedance at an output of at least one Radio Frequency (RF) power amplifier of the wireless device. The processing circuitry couples to the impedance determination circuitry and alters at least one operating parameter of the wireless device based upon the determined load impedance.

Abstract: Communication processing paths include distortions, such as DC offset in the baseband analog path, local oscillator feed-through distortion, and nonlinearity of gm's and power amplifiers which are calibrated for, separately or in combination. The cascaded DC offset and nonlinear distortions are modeled separately or in combination using even-and-odd order polynomials. A loopback path from the output of one or more distortion causing devices passes through a measurement and calculation module. The calculation module calculates predistortion polynomial's coefficients which will be stored in a look-up table to be used by a baseband predistorter to calibrate the path. The look-up table is stored locally or remotely.

Abstract: Communication processing paths include distortions, such as DC offset in the baseband analog path, local oscillator feed-through distortion, and nonlinearity of gm's and power amplifiers which are calibrated for, separately or in combination. The cascaded DC offset and nonlinear distortions are modeled separately or in combination using even-and-odd order polynomials. A loopback path from the output of one or more distortion causing devices passes through a measurement and calculation module. The calculation module calculates predistortion polynomial's coefficients which will be stored in a look-up table to be used by a baseband predistorter to calibrate the path. The look-up table is stored locally or remotely.

Abstract: A wireless device includes impedance determination and processing circuitry. The impedance determination circuitry determines load impedance at an output of at least one Radio Frequency (RF) power amplifier of the wireless device. The processing circuitry couples to the impedance determination circuitry and alters at least one operating parameter of the wireless device based upon the determined load impedance.

Abstract: A DSL modem (21) including a configurable digital transceiver (30) is disclosed. The digital transceiver (30) includes a configuration register (43), or other circuitry, that selects a number of analog transmission ports to be implemented in the modem (21). Instances of analog front-end circuitry (34) for each of the configured ports is also provided. According to the disclosed embodiments, the number of ports supported is scaled with the data rate for each port, and with the signaling bandwidth for each port, to maximize the efficiency of the transmission.

Abstract: An architecture for a cascaded digital filters comprises independently programmable controlling registers and independent interpolating factors; a digital to analog converter for converting the digital signals into analog signals with a constant sampling rate which matches with the interpolating factors of the cascaded digital filters. Each filter property (filters order, coefficient symmetry, half-band, and poly-phase) can be programmed independently to support different system requirements and extract maximum throuput from a given hardware. The method of filtering digital signals comprises the steps of determining an interpolation factor of the cascaded digital filters with the lowest number of computations so as to match with the single sampling rate of the digital to analog converter, determining active filters and an interpolation factor of each digital filter in the cascaded digital filters, and determining a mode of operation of the cascaded digital filters.

Abstract: A DSL modem (21) including a configurable digital transceiver (30) is disclosed. The digital transceiver (30) includes a configuration register (43), or other circuitry, that selects a number of analog transmission ports to be implemented in the modem (21). Instances of analog front-end circuitry (34) for each of the configured ports is also provided. According to the disclosed embodiments, the number of ports supported is scaled with the data rate for each port, and with the signaling bandwidth for each port, to maximize the efficiency of the transmission.

Abstract: A Viterbi type decoder which discards paths with metrics more than a distance from the smallest metric with the distance determined by the smallest distance between paths in the trellis.