Abstract: A patching system and a patching circuit provide a type of patching entry which can replace several sequential memory positions with hardcoded and dynamically configured assembly instructions, thus injecting a small piece of code. The operation of the injected code can be for any purpose, but as an example may be used to seamlessly redirect the execution flow of a processing unit.

Abstract: An infrared signal generator with an interface for receiving an encoded infrared command; and protocol generation circuitry for generating a bitstream that comprises one or more data words that comprise data to be transmitted and one or more protocol words that describe symbols of an infrared protocol is presented. Optionally, the protocol generation circuitry comprises a first circuit for generating a data word and a second circuit for generating a protocol word. Optionally, the infrared signal generator comprises a carrier frequency generator which is selectively combined with the output of either the first circuit or the second circuit to provide a drive signal for an infrared transmitter.

Abstract: A method and apparatus for executing an application program stored in an one-time-programmable, OTP, memory in a system on chip (SoC) is described. The SoC has RAM, a CPU and an OTP controller. The OTP memory stores an application program. The method includes, by the processor unit at power-up, instructing the OTP controller to copy the application program from the OTP memory to RAM, executing the application program from RAM, and setting the system on chip (SoC) in sleep mode. By the OTP controller after a wake-up, copying the application program from the OTP memory to the RAM and after the copying, waking up the CPU and transferring control back to the CPU. By the CPU after being woken up by the OTP controller, executing the application program from RAM.

Abstract: An integrated circuit with a patching function comprises a one-time programmable memory (OTP), a random access memory (RAM), and a control unit. The control unit copies data stored on the OTP into the RAM to obtain a copied image mirroring said data. It checks for presence of one or more patch instructions in the OTP, and, if a patch instruction is found in the OTP, modifies a portion of the copied image based on the patch instruction, to obtain a patched image stored in the RAM. The integrated circuit further comprises a processing unit configured to access the patched image in the RAM. The patch can be provided wirelessly.

Abstract: A patching system and a patching circuit provide a type of patching entry which can replace several sequential memory positions with hardcoded and dynamically configured assembly instructions, thus injecting a small piece of code. The operation of the injected code can be for any purpose, but as an example may be used to seamlessly redirect the execution flow of a processing unit.

Abstract: An infrared signal generator with an interface for receiving an encoded infrared command; and protocol generation circuitry for generating a bitstream that comprises one or more data words that comprise data to be transmitted and one or more protocol words that describe symbols of an infrared protocol is presented. Optionally, the protocol generation circuitry comprises a first circuit for generating a data word and a second circuit for generating a protocol word. Optionally, the infrared signal generator comprises a carrier frequency generator which is selectively combined with the output of either the first circuit or the second circuit to provide a drive signal for an infrared transmitter.

Abstract: A method and apparatus for executing an application program stored in an one-time-programmable, OTP, memory in a system on chip (SoC) is described. The SoC has RAM, a CPU and an OTP controller. The OTP memory stores an application program. The method includes, by the processor unit at power-up, instructing the OTP controller to copy the application program from the OTP memory to RAM, executing the application program from RAM, and setting the system on chip (SoC) in sleep mode. By the OTP controller after a wake-up, copying the application program from the OTP memory to the RAM and after the copying, waking up the CPU and transferring control back to the CPU. By the CPU after being woken up by the OTP controller, executing the application program from RAM.

Abstract: A patching circuit for patching a memory 2 is disclosed. An address register 1 is configured to store a first memory address. A comparison unit 4 is configured to receive a second memory address from an address bus 5, and to receive the first memory address. The comparison unit is further configured to compare the first memory address with the second memory address. A selecting unit 7 is configured to receive a value from a data register 3 associated with the address register 1, and a value from an input data bus 8, wherein the second value corresponds to the value stored in a position of the memory 2 identified by the second memory address. The selecting unit 7 is further configured to select one of the values based on the comparison performed, and to send the value to an output data bus 10.

Abstract: An integrated circuit with a patching function comprises a one-time programmable memory (OTP), a random access memory (RAM), and a control unit. The control unit copies data stored on the OTP into the RAM to obtain a copied image mirroring said data. It checks for presence of one or more patch instructions in the OTP, and, if a patch instruction is found in the OTP, modifies a portion of the copied image based on the patch instruction, to obtain a patched image stored in the RAM. The integrated circuit further comprises a processing unit configured to access the patched image in the RAM. The patch can be provided wirelessly.