Abstract: A device such as a cardiac pacemaker or other implantable biomedical device, and method of operation thereof, containing one or more switchable circuits. A control system, preferably incorporating a microprocessor, controls predetermined changes of the operating characteristics of the switchable circuits. In a cardiac pacer embodiment, a circuit such as the input amplifier can be switched to have different characteristics, e.g. filter setting and sensitivity, during predetermined portions of the pacer cycle. Further, the operation of a circuit can be monitored over a plurality of operating cycles, with controlled switching of the circuit characteristics as a function of cumulative monitored circuit performance. A specific example of the invention is shown for changing characteristics of a filter circuit used in a pacer which adjusts the pacer rate as a function of determined stimulus-T wave time interval.

Abstract: Apparatus for producing programmable timing signals, having a microprocessor element with means for carrying out DMA operations when said microprocessor element is in a DMA mode, memory interconnected with said microprocessor element and containing a stored program and a plurality of data words stored at predetermined addresses for selection by said microprocessor when in said DMA mode, comprising controller means for transforming received data words into timing signals, connecting means for interconnecting said microprocessor element, said controller and said memory, said controller having means for setting said microprocessor in said DMA mode upon receipt of a predetermined signal generated by said program, means for receiving data words directly from said memory under control of said microprocessor when said microprocessor is in said DMA mode, and means for generating a two state timing signal corresponding to the data content of one or more such received data words.

Abstract: A biomedical system such as a pacemaker system having an implantable pacemaker and external apparatus, with communications capability for communicating between the implanted device and the external apparatus, characterized by the implanted device having means for cyclically transmitting event and device timing data representative of each prior device interval, the external apparatus having means for receiving and storing the data and for graphically constructing a graphic output representative of the timing and event information over a plurality of device cycles. Graphic output preferably includes a linear timing graph representative of timing functions of the implanted device.

Abstract: A self-adjusting voltage regulator circuit on a CMOS chip, for use with CMOS digital and/or analog circuit, providing a voltage which is selected in accordance with the characteristics of the chip to optimally current control operation of CMOS circuits on this chip. The voltage regulator circuit has a reference CMOS pair with a predetermined geometry, and current means are provided for driving a current through said reference pair which is adjusted to operate the pair at a desired point of current controlled operation. The voltage across the reference pair is utilized to provide the regulated voltage to other CMOS pairs, which pairs have respective geometries of predetermined relation to the reference pair geometry, whereby the regulated voltage and the relative geometry provide current controlled operation of each such CMOS pair.

Abstract: A physiological device adapted for implantation in a human patient, e.g. a cardiac pacemaker or muscle stimulator, characterized by having programmable means for generating data and assembling same for presentation of one or more histograms. The implanted device has circuitry for registering the occurrence of sensed or evoked events, as well as device operating events such as cycles of operation, and means, preferably software control of a microprocessor, for classifying registered events into respective classes of one or more parameters associated with the events and for accumulating counts of events for each such class. The system also includes external apparatus for communicating programmed instructions to the device, whereby histogram selection and histogram classes are programmed, and for receiving the histogram data transmitted from the implanted device and displaying it in a convenient histogram form. Time based histograms are also generated, utilizing a software clock for continuously tracking time.

Abstract: A programmable pacemaker apparatus having a microprocessor and means for receiving program information from an external source, means for generating and delivering stimulus signals and means for sensing the occurrence of natural heartbeats in a patient, and having a battery source powering the apparatus, said microprocessor being combined with program instructions stored in memory for controlling the operation of said pacemaker, comprising controller circuit means external to said microprocessor and interconnected therewith for controlling the operating state of said microprocessor, said controller means having occurrence means for determining the occurrence of given events. The controller means further comprises means for stopping operation of the microprocessor on command from the microprocessor and for starting operation of the microprocessor upon determination of one of said events, whereby the microprocessor normally is on less than about 25% of the time.

Abstract: A pacing system and method of programming the rate of said system is disclosed, wherein the pacemaker comprises circuitry for receiving a first group of simple on-off magnetic pulses which are accumulated and translated into the decades portion of the desired heartbeat rate (in bpm), and also for receiving a second group of pulses which are translated into the units count of the desired pacing rate in bpm. The circuitry provides that an initial portion of the programming signal is inspected relative to predetermined criteria, so that such initial portion acts also as an enabling key for accepting the overall programming signal. The doctor simply applies a simple hand held magnet t times according to the desired tens component of the programmed rate in bpm, maintains the magnet applied for at least a predetermined number of pacer intervals, and then applies the magnet u times corresponding to the units component of the desired heart rate, thereby programming the pacer to operate at tu bpm.

Abstract: A physiological stimulating system includes improved means for minimizing the polarization that results at the stimulus site, thereby enabling enhanced detection of evoked responses. In the pacemaker embodiment, the stimulus signal comprises positive recharge pulses immediately before and immediately after the negative stimulus signal, the recharge pulses being adapted in a time duration and amplitude such that the total current delivered to the stimulus site, (e.g., a patient's heart) by the stimulus signal is substantially zero.

Abstract: A physiological stimulating system includes improved means for minimizing the polarization that results at the stimulus site, thereby enabling enhanced detection of evoked responses. In the pacemaker embodiment, the stimulus signal comprises positive recharge pulses immediately before and immediately after the negative stimulus signal, the recharge pulses being adapted in a time duration and amplitude such that the total current delivered to the stimulus site, (e.g., a patient's heart) by the stimulus signal is substantially zero.

Abstract: There is provided a programmable pacer which is adapted to be programmed from an external source in either a slow program mode, wherein the external source is a simple magnet, or a fast program mode wherein the external programming signals are generated automatically and comprise a constant magnetic signal along with a modulated relatively high frequency magnetic signal. The pacer has means for receiving both fast and slow type program signals and means for processing the received program signals, whether of the fast or slow type, to derive control signals therefrom when the program signals conform to a predetermined program arrangement.

Abstract: A monolithic pacer is provided which utilizes I.sup.2 L circuitry in combination with linear transistors, providing the conventional advantages of analog circuitry together with the flexibility of digital circuitry. Low current drain operation is achieved by current source control of circuit operating conditions, with I.sup.2 L gates being utilized alone and in combination with linear transistors to provide current sources. The pacer provides "on-demand" logic and is externally programmable.