Abstract: An IPL system according to the present invention includes a file server, a dividing unit and a decision unit. The file server stores system data consisting of programs and data. The dividing unit is operatively connected to the file server, divides the system data into functional units, and prepares functional processors each structured by gathering the functional units. The decision unit is operatively connected to the file server and determines the functional processors to be transferred to each of the plurality of processors, in accordance with contents of operation data which are different from each other in each of the plurality of processors. According to the present invention, it is possible to realize an effective IPL of the processor by selectively using functional processors consisting of system data functional processors and operation data functional processors, in accordance with the different functions in each processor.

Abstract: A method employs simple procedures to speedily carry out loopback tests on devices that form a channel system of an exchange. The method is capable of quickly locating a fault in the exchange and allowing speedy maintenance work of the exchange. Also provided is an apparatus for achieving the method. The apparatus has a path setter (1-4), a loopback controller (1-3), and a tester (1-1), to test the devices of the channel system (1-2) of the exchange. The devices to be tested are arranged in replaceable units (1-21, 1-22). The path setter (1-4) simultaneously sets paths to sequentially connect the devices to be tested. The loopback controller (1-3) activates and releases loopback parts arranged in the devices to be tested. The tester (1-1) sends a test signal to the devices through the paths, receives the test signal looped back by the loopback parts, analyzes the received signal, and determines whether or not the devices are sound.

Abstract: An information processing apparatus includes at least one input and output devices each having a plurality of input and output ports, and a plurality of processors which, connected to the one or the plurality of input and output ports via a bus, process requests for processes requiring a use of the input and output ports in a distributed manner.

Abstract: The invention provides an information processing apparatus and a data processing method for the information processing apparatus wherein software processing is performed using a program and/or data and which are improved in that the reliability of data can be raised flexibly in accordance with a degree of reliability required for the data even after operation of a system is started without using a specific backup hardware construction. The information processing apparatus is of the type wherein software processing is performed using data stored in a storage apparatus and includes a first storage apparatus for storing original data, a second storage apparatus for storing preliminary data which can back up the original data and can be used similarly to the original data in the software processing, and a data duplicating registration section for storing a relation between the original data and the preliminary data into a storage table.

Abstract: A device control apparatus includes a request accepting unit which accepts a device control request, the device control request containing an instruction code indicating a specified instruction and a device identifier indicating a specified device. A competition control unit includes a set of competition definition tables for respective devices and respective device-control instructions, reads out one of the competition definition tables by the device control request, and recognizes competition states between in-process instructions to competition devices and the specified instruction to the specified device by using the read-out competition definition table. A parallel execution control unit performs execution of one or a plurality of the specified instruction and the in-process instructions in accordance with the competition states when a sum of a first weight for the specified instruction and a second weight for the in-process instructions is less than a maximum weight.

Abstract: A multiprocessor system includes duplex processors, each duplex processor having two processors, one being active and the other being a stand-by processor. Each processor includes a central processing unit (CPU) and main storage, the CPU being able to access the main storage in the other processor of the duplex processor. Each duplex processor is interconnected through communication buses to enable communication between any processors, and a particular processor can read a program file from program file storage and send it to each processor. For updating from an old program file to a new program file, each duplex processor is able to access each communication bus to identify an usable communication bus for each target processor, to set any communication bus to an active communication path for each target processor, and to transmit/receive data on the active communication path while setting another communication bus as a stand-by communication path.