Abstract: A semiconductor device includes a gate electrode, first and second transistors arranged in a first direction, first and second drain wirings each connected to a corresponding drain region of the first and second transistors, first output wiring extending in a second direction orthogonal to the first direction and having one end connected to a portion adjacent to the second transistor of the first drain wiring, second output wiring extending in the second direction and having one end connected to a portion adjacent to the first transistor of the second drain wiring, third output wiring extending in the first direction and connected to the other end of the first output wiring and the other end of the second output wiring, and fourth output wiring connecting a center portion of the third output wiring to an output terminal.

Abstract: A Wilkinson power divider includes an input line, a first branching line and a second branching line branching from the input line, a first output line coupled to a first end of an output side of the first branching line, a second output line coupled to a second end of an output side of the second branching line, a first stub coupled to the first end, a second stub coupled to the second end, an isolation resistor coupled between the first stub and the second stub, and a circuit branching from a first point between two ends of the first stub, and a second point between two ends of the second stub, and coupling between the first point and the second point. At least a portion of the first stub, at least a portion of the second stub, and the first circuit form a resonant circuit.

Abstract: A semiconductor device includes a gate interconnect, extending in a first direction, and configured to transmit an input signal, and a transistor including gate electrodes extending in a second direction perpendicular to the first direction, and spaced apart from one another, and connected to the gate interconnect, and source and drain regions alternately arranged along the first direction, so that each gate electrode is sandwiched between the source and drain region which are adjacent to each other. The semiconductor device also includes drain interconnects, arranged above the drain regions, and connected to the drain regions, respectively, an output interconnect, connected to the drain interconnects, and configured to transmit an output signal output from the drain regions, and stubs connected to the drain interconnects, respectively. At least one of the stubs is connected to one of the drain interconnects at an end opposite from the gate interconnect.

Abstract: An amplifier circuit includes a first FET including a first semiconductor layer, a first source electrode, a first gate electrode, a first drain electrode and a first source wall having at least a part thereof provided above the first semiconductor layer between the first gate electrode and the first drain electrode, and a second FET including a second semiconductor layer, a second source electrode, a second gate electrode, a second drain electrode and a second source wall having at least a part thereof provided above the second semiconductor layer between the second gate electrode and the second drain electrode, wherein a length of the second source wall in a direction in which the second source electrode and the second drain electrode are arranged is smaller than that of the first source wall in a direction in which the first source electrode and the first drain electrode are arranged.

Abstract: A semiconductor device includes a gate interconnect, extending in a first direction, and configured to transmit an input signal, and a transistor including gate electrodes extending in a second direction perpendicular to the first direction, and spaced apart from one another, and connected to the gate interconnect, and source and drain regions alternately arranged along the first direction, so that each gate electrode is sandwiched between the source and drain region which are adjacent to each other. The semiconductor device also includes drain interconnects, arranged above the drain regions, and connected to the drain regions, respectively, an output interconnect, connected to the drain interconnects, and configured to transmit an output signal output from the drain regions, and stubs connected to the drain interconnects, respectively. At least one of the stubs is connected to one of the drain interconnects at an end opposite from the gate interconnect.

Abstract: A semiconductor device includes a gate wiring line connected to an input wiring line, a first and second transistors disposed on both sides of the gate wiring line, and a signal combining wiring line. The signal combining wiring line includes a first output wiring line that extends on or above the first transistor over at least one source wiring line and at least one gate electrode and that is connected to drain wiring lines of the first transistor, a second output wiring line that extends on or above the second transistor over at least one source wiring line and at least one gate electrode and that is connected to drain wiring lines of the second transistor, a third output wiring line that connects the first and the second output wiring lines, and a fourth output wiring line that connects the third output wiring line to the output terminal.

Abstract: A semiconductor device includes a gate electrode, first and second transistors arranged in a first direction, first and second drain wirings each connected to a corresponding drain region of the first and second transistors, first output wiring extending in a second direction orthogonal to the first direction and having one end connected to a portion adjacent to the second transistor of the first drain wiring, second output wiring extending in the second direction and having one end connected to a portion adjacent to the first transistor of the second drain wiring, third output wiring extending in the first direction and connected to the other end of the first output wiring and the other end of the second output wiring, and fourth output wiring connecting a center portion of the third output wiring to an output terminal.

Abstract: A Wilkinson power divider includes an input line, a first branching line and a second branching line branching from the input line, a first output line coupled to a first end of an output side of the first branching line, a second output line coupled to a second end of an output side of the second branching line, a first stub coupled to the first end, a second stub coupled to the second end, an isolation resistor coupled between the first stub and the second stub, and a circuit branching from a first point between two ends of the first stub, and a second point between two ends of the second stub, and coupling between the first point and the second point. At least a portion of the first stub, at least a portion of the second stub, and the first circuit form a resonant circuit.

Abstract: An amplifying device includes a radio frequency (RF) signal input terminal to which an RF signal is input, a buffer circuit, a linearizer including a transistor, a power amplifier, and a control circuit. The control circuit outputs a first gate voltage when a level of the RF signal input is a first level, the first gate voltage causing the transistor to perform a class B operation. The control circuit outputs a second gate voltage when the level of the RF signal is a second level higher than the first level, the second gate voltage causing the transistor to perform a class AB operation. Output impedance of the buffer circuit that is seen from an input side of the linearizer is set such that a reflection loss of the RF signal input from the buffer circuit to the linearizer is a predetermined level or less.