Patents by Inventor Kostas Papathomas

Kostas Papathomas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8445094
    Abstract: A circuitized substrate which includes at least one circuit layer and at least one substantially solid dielectric layer comprised of a dielectric composition which includes a cured resin material and a predetermined percentage by weight of particulate fillers, but not including continuous or semi-continuous fibers as part thereof.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: May 21, 2013
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Kostas Papathomas
  • Patent number: 8198551
    Abstract: A power core adapted for use as part of a circuitized substrate, e.g., a PCB or LCC. The core includes a first layer of low expansion dielectric and two added layers of a different low expansion dielectric bonded thereto, with two conductive layers positioned on the two added low expansion dielectric layers. At least one of the conductive layers serves as a power plane for the power core, which in turn is usable within a circuitized substrate, also provided. Methods of making the power core and circuitized substrate are also provided. The use of different low expansion dielectric materials for the power core enables the use of support enhancing fiberglass in one layer while such use is precluded in the other two dielectric layers, thus preventing CAF shorting problems in highly precisely defined thru holes formed within the power core.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: June 12, 2012
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, Kostas Papathomas, John Steven Kresge, Timothy Antesberger
  • Publication number: 20110284273
    Abstract: A power core adapted for use as part of a circuitized substrate, e.g., a PCB or LCC. The core includes a first layer of low expansion dielectric and two added layers of a different low expansion dielectric bonded thereto, with two conductive layers positioned on the two added low expansion dielectric layers. At least one of the conductive layers serves as a power plane for the power core, which in turn is usable within a circuitized substrate, also provided. Methods of making the power core and circuitized substrate are also provided. The use of different low expansion dielectric materials for the power core enables the use of support enhancing fiberglass in one layer while such use is precluded in the other two dielectric layers, thus preventing CAF shorting problems in highly precisely defined thru holes formed within the power core.
    Type: Application
    Filed: May 18, 2010
    Publication date: November 24, 2011
    Applicant: ENDICOTT INTERCONNECT TECHNOLOGIES, INC.
    Inventors: Robert M. Japp, Kostas Papathomas, John S. Kresge, Timothy Antesberger
  • Patent number: 7508076
    Abstract: An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: March 24, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Patent number: 7416996
    Abstract: A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: August 26, 2008
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Publication number: 20080003407
    Abstract: A circuitized substrate which includes at least one circuit layer and at least one substantially solid dielectric layer comprised of a dielectric composition which includes a cured resin material and a predetermined percentage by weight of particulate fillers, but not including continuous or semi-continuous fibers as part thereof.
    Type: Application
    Filed: September 6, 2007
    Publication date: January 3, 2008
    Inventors: Robert Japp, Kostas Papathomas
  • Publication number: 20070221404
    Abstract: A circuitized substrate which includes a conductive paste for providing electrical connections. The paste, in one embodiment, includes a metallic component including nano-particles and may include additional elements such as solder or other metal micro-particles, as well as a conducting polymer and organic. The particles of the paste composition sinter and, depending on what additional elements are added, melt as a result of lamination to thereby form effective contiguous circuit paths through the paste. A method of making such a substrate is also provided, as is an electrical assembly utilizing the substrate and including an electronic component such as a semiconductor chip coupled thereto.
    Type: Application
    Filed: May 23, 2007
    Publication date: September 27, 2007
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra Das, Kostas Papathomas, Voya Markovich
  • Patent number: 7270845
    Abstract: A dielectric composition which forms a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like. As such a layer, it includes a cured resin material and a predetermined percentage by weight of particulate fillers, thus not including continuous fibers, semi-continuous fibers or the like as part thereof.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: September 18, 2007
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Kostas Papathomas
  • Publication number: 20070182016
    Abstract: A method of making a circuitized substrate including a composite layer including a first dielectric sub-layer including a plurality of fibers having a low coefficient of thermal expansion and a second dielectric sub-layer of a low moisture absorptivity resin, the second dielectric sub-layer not including continuous or semi-continuous fibers or the like as part thereof. The substrate further includes at least one electrically conductive layer as part thereof.
    Type: Application
    Filed: April 5, 2007
    Publication date: August 9, 2007
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Irving Memis, Kostas Papathomas
  • Publication number: 20070177331
    Abstract: A capacitor material including a thermosetting resin (e.g., epoxy resin), a high molecular mass flexibilizer (e.g., phenoxy resin), and a quantity of nano-particles of a ferroelectric ceramic material (e.g., barium titanate), the capacitor material not including continuous or semi-continuous fibers (e.g., fiberglass) as part thereof. The material is adapted for being positioned in layer form on a first conductor member and heated to a predetermined temperature whereupon the material will not possess any substantial flaking characteristics. A second conductor member may then be positioned on the material to form a capacitor member, which then may be incorporated within a substrate to form a capacitive substrate. Electrical components may be positioned on the substrate and capacitively coupled to the internal capacitor.
    Type: Application
    Filed: April 4, 2007
    Publication date: August 2, 2007
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra Das, John Lauffer, Voya Markovich, Kostas Papathomas
  • Publication number: 20060183316
    Abstract: A method of making a printed circuit board in which conductive thru-holes are formed within two dielectric layers of the board's structure so as to connect designated conductive layers. One hole connects two adjacent layers and the other connects two adjacent layers, including one of the conductive layers connected by the other hole. It is also possible to connect all three conductive layers using one or more holes. The resulting holes may be filled, e.g., with metal plating, or conductive or non-conductive paste. In the case of the latter, it is also possible to provide a top covering conductive layer over the paste, e.g., to serve as a pad or the like on the board's external surface.
    Type: Application
    Filed: April 5, 2006
    Publication date: August 17, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: James Larnerd, John Lauffer, Voya Markovich, Kostas Papathomas
  • Publication number: 20060180936
    Abstract: A dielectric composition for forming a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like, the composition including at least two fluoropolymers and two inorganic fillers. A circuitized substrate including at least one such dielectric layer and at least one conductive layer thereon is also provided.
    Type: Application
    Filed: March 28, 2006
    Publication date: August 17, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Kosta Papathomas
  • Patent number: 7078816
    Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate is also provided, as is a circuitized structure including the circuitized substrate in combination with other circuitized substrates having lesser dense thru-hole patterns. An information handling system incorporating the circuitized substrate of the invention as part thereof is also provided.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: July 18, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David L. Thomas
  • Publication number: 20060151863
    Abstract: A material for use as part of an internal capacitor within a circuitized substrate includes a polymer (e.g., a cycloaliphatic epoxy or phenoxy based) resin and a quantity of nano-powders of ferroelectric ceramic material (e.g., barium titanate) having a particle size substantially in the range of from about 0.01 microns to about 0.90 microns and a surface area for selected ones of said particles within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
    Type: Application
    Filed: January 10, 2005
    Publication date: July 13, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra Das, John Lauffer, Kostas Papathomas, Mark Poliks
  • Publication number: 20060131755
    Abstract: A method of making a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Application
    Filed: February 9, 2006
    Publication date: June 22, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David Thomas
  • Publication number: 20060125103
    Abstract: An information handling system which includes as part thereof a circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer.
    Type: Application
    Filed: February 10, 2006
    Publication date: June 15, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David Thomas
  • Publication number: 20060054870
    Abstract: A dielectric composition which is adapted for combining with a supporting material (e.g., fiber-glass cloth) to form a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like. As such a layer, it includes a resin, a predetermined percentage by weight of a filler, and, significantly, only a minor amount of bromine. A circuitized substrate comprised of one or more of these dielectric layers and one or more conductive layers is also provided.
    Type: Application
    Filed: November 3, 2005
    Publication date: March 16, 2006
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Kostas Papathomas
  • Publication number: 20050224767
    Abstract: A dielectric composition which forms a dielectric layer usable in circuitized substrates such as PCBs, chip carriers and the like. As such a layer, it includes a cured resin material and a predetermined percentage by weight of particulate fillers, thus not including continuous fibers, semi-continuous fibers or the like as part thereof.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 13, 2005
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Kostas Papathomas
  • Publication number: 20050224985
    Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a resin material including a predetermined quantity of particles therein and not including continuous fibers, semi-continuous fibers or the like as part thereof, and at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate is also provided, as is a circuitized structure including the circuitized substrate in combination with other circuitized substrates having lesser dense thru-hole patterns. An information handling system incorporating the circuitized substrate of the invention as part thereof is also provided.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 13, 2005
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert Japp, Voya Markovich, Cheryl Palomaki, Kostas Papathomas, David Thomas
  • Publication number: 20050224251
    Abstract: A circuitized substrate comprising a first layer comprised of a dielectric material including a low moisture absorptive polymer resin in combination with a nodular fluoropolymer web encased within the resin, the resulting dielectric layer formed from this combination not including continuous or semi-continuous fibers as part thereof. The substrate further includes at least one circuitized layer positioned on the dielectric first layer. An electrical assembly and a method of making the substrate are also provided, as is an information handling system (e.g., computer) incorporating the circuitized substrate of the invention as part thereof.
    Type: Application
    Filed: August 18, 2004
    Publication date: October 13, 2005
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Irving Memis, Kostas Papathomas