Patents by Inventor Kosuke Asano
Kosuke Asano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11972365Abstract: A question generation device includes: generating means which uses a query and a relevant document including an answer to the query as input and, using a machine learning model having been learned in advance, generates a revised query in which a potentially defective portion of the query is supplemented with a word included in a prescribed lexical set.Type: GrantFiled: April 25, 2019Date of Patent: April 30, 2024Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Atsushi Otsuka, Kyosuke Nishida, Itsumi Saito, Kosuke Nishida, Hisako Asano, Junji Tomita
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Publication number: 20240136028Abstract: An information processing system includes a first information processing device and a second information processing device. The first information processing device is configured to receive the atomic information from the second information processing device, calculate a processing result corresponding to the atomic information by inputting the atomic information into a neural network, and transmit the processing result to the second information processing device. The second information processing device is configured to transmit atomic information to the first information processing device.Type: ApplicationFiled: December 8, 2023Publication date: April 25, 2024Applicants: Preferred Networks, Inc., ENEOS CorporationInventors: Kosuke NAKAGO, Daisuke TANIWAKI, Motoki ABE, Marc Alan ONG, So TAKAMOTO, Takao KUDO, Yusuke ASANO
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Patent number: 11954435Abstract: A text generation apparatus includes a memory and a processor configured to execute acquiring a reference text based on an input text and information different from the input text; and generating a text based on the input text and the reference text, wherein the acquiring and the generating are implemented as neural networks based on learned parameters.Type: GrantFiled: March 3, 2020Date of Patent: April 9, 2024Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Itsumi Saito, Kyosuke Nishida, Kosuke Nishida, Hisako Asano, Junji Tomita, Atsushi Otsuka
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Publication number: 20240087073Abstract: A control device reads power consumption, information on the delivery number and weight of a first product set, and information on the delivery number and weight of a second product set from a storage device. The control device proportionally divides the power consumption. The control device reads a first conversion formula from the storage device, and calculates CO2 emissions from transportation of the first product set from an A station to a B station and CO2 emissions from transportation of the second product set from the A station to the B station by substituting the power consumptions, into the first conversion formula.Type: ApplicationFiled: July 10, 2023Publication date: March 14, 2024Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Atsushi KOMADA, Mitsuru OGASAWARA, Masahiko ISHII, Hidetaka ASANO, Tomokazu ISHII, Koji HETSUGI, Kosuke YONEKAWA, Yoshikazu JIKUHARA
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Publication number: 20240078500Abstract: A management device includes a communication device and a control device. The communication device is configured to communicate with a moving object configured to transport a product from an upstream company to a downstream company. The control device is configured to calculate CO2 emissions emitted by transportation of the product based on an amount of energy consumed by the moving object from a transportation start time point to a transportation completion time point of the product.Type: ApplicationFiled: August 11, 2023Publication date: March 7, 2024Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Atsushi KOMADA, Mitsuru OGASAWARA, Masahiko ISHII, Hidetaka ASANO, Tomokazu ISHII, Koji HETSUGI, Kosuke YONEKAWA, Yoshikazu JIKUHARA
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Publication number: 20240069506Abstract: A management method for managing a CO2 emission amount to be emitted by producing a product, includes: reading out a first CO2 emission amount that is a CO2 emission amount per unit weight of a first raw material and a second CO2 emission amount that is a CO2 emission amount per unit weight of a second raw material; and calculating the CO2 emission amount of the product based on a CO2 emission amount to be calculated from the first CO2 emission amount and from a weight of the first raw material used to produce the product, and a CO2 emission amount to be calculated from the second CO2 emission amount and from a weight of the second raw material used to produce the product.Type: ApplicationFiled: August 7, 2023Publication date: February 29, 2024Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Atsushi KOMADA, Mitsuru OGASAWARA, Masahiko ISHII, Hidetaka ASANO, Tomokazu ISHII, Koji HETSUGI, Kosuke YONEKAWA, Yoshikazu JIKUHARA
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Publication number: 20240069533Abstract: A management method for management of a CO2 emission amount emitted by production of a product in a production line where a first product and a second product are produced includes acquiring a power consumption amount consumed in the production line for a predetermined period, and calculating a CO2 emission amount for each product by allocating the power consumption amount based on a ratio of a total work time required to produce the first product in the production line during the predetermined period and a total work time required to produce the second product in the production line during the predetermined period.Type: ApplicationFiled: August 3, 2023Publication date: February 29, 2024Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Atsushi KOMADA, Mitsuru OGASAWARA, Masahiko ISHII, Hidetaka ASANO, Tomokazu ISHII, Koji HETSUGI, Kosuke YONEKAWA, Yoshikazu JIKUHARA
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Patent number: 11686688Abstract: An inspection apparatus inspecting a wafer on which a plurality of patterns are formed by a plurality of exposure shots, the inspection apparatus comprising: acquisition unit configured to acquire first information representing a positional relation between an inspection mark included in a pattern formed by a first exposure shot and an inspection mark included in a pattern formed by a second exposure shot, and second information representing a positional relation between the inspection mark included in the pattern formed by the second exposure shot and an inspection mark included in a pattern formed by a third exposure shot; and derivation unit configured to derive a linear component of an error caused by a reticle, and a linear component of an error caused by a position of a wafer, on the basis of the first information and the second information.Type: GrantFiled: December 23, 2020Date of Patent: June 27, 2023Assignee: Canon Kabushiki KaishaInventors: Kosuke Asano, Hideki Ina
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Patent number: 11543755Abstract: A method of manufacturing a semiconductor device by using an exposure apparatus having a reticle stage and a projection optical system includes a first period in which substrates are exposed by using a first reticle arranged on the reticle stage, a second period in which substrates are exposed by using a second reticle arranged on the reticle stage, and a third period which is between the first and second periods. The method includes changing, in at least part of the third period, the first reticle arranged on the reticle stage to the second reticle, and performing control, in the first and second periods, to adjust temperature distribution of an optical element of the projection optical system so as to reduce change in aberration of the projection optical system. The third period is shorter than the first period.Type: GrantFiled: March 19, 2021Date of Patent: January 3, 2023Assignee: CANON KABUSHIKI KAISHAInventors: Takehiro Toyoda, Hiroaki Kobayashi, Hideki Ina, Kosuke Asano, Kouki Miyano
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Publication number: 20210302842Abstract: A method of manufacturing a semiconductor device by using an exposure apparatus having a reticle stage and a projection optical system includes a first period in which substrates are exposed by using a first reticle arranged on the reticle stage, a second period in which substrates are exposed by using a second reticle arranged on the reticle stage, and a third period which is between the first and second periods. The method includes changing, in at least part of the third period, the first reticle arranged on the reticle stage to the second reticle, and performing control, in the first and second periods, to adjust temperature distribution of an optical element of the projection optical system so as to reduce change in aberration of the projection optical system. The third period is shorter than the first period.Type: ApplicationFiled: March 19, 2021Publication date: September 30, 2021Inventors: Takehiro Toyoda, Hiroaki Kobayashi, Hideki Ina, Kosuke Asano, Kouki Miyano
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Publication number: 20210265411Abstract: A semiconductor device includes a plurality of wirings each having a damascene structure on a semiconductor layer, wherein the plurality of wirings includes a first wiring and a second wiring adjacent to each other, wherein the first wiring includes, along a direction in which the first wiring extends, a first portion, a second portion, and a third portion located between the first portion and the second portion, and wherein a width of the third portion is larger than each of a width of the first portion and a width of the second portion.Type: ApplicationFiled: February 16, 2021Publication date: August 26, 2021Inventors: Junya Tamaki, Takafumi Miki, Ryo Yoshida, Atsushi Kanome, Kosuke Asano, Takehiro Toyoda, Masaki Masaki
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Publication number: 20210199596Abstract: An inspection apparatus inspecting a wafer on which a plurality of patterns are formed by a plurality of exposure shots, the inspection apparatus comprising: acquisition unit configured to acquire first information representing a positional relation between an inspection mark included in a pattern formed by a first exposure shot and an inspection mark included in a pattern formed by a second exposure shot, and second information representing a positional relation between the inspection mark included in the pattern formed by the second exposure shot and an inspection mark included in a pattern formed by a third exposure shot; and derivation unit configured to derive a linear component of an error caused by a reticle, and a linear component of an error caused by a position of a wafer, on the basis of the first information and the second information.Type: ApplicationFiled: December 23, 2020Publication date: July 1, 2021Inventors: Kosuke Asano, Hideki Ina, Yoshiyuki Nakagawa, Junya Tamaki, Takehiro Toyoda, Tomoyuki Tezuka, Yasushi Ohta, Masao Ishioka, Yasushi Matsuno
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Patent number: 10319765Abstract: An imaging device includes a pixel region in which a plurality of pixels, each including a photoelectric converter, are arranged, including an effective pixel region, an optical black region covered with a light-shielding film, and a dummy pixel region arranged between the effective pixel region and the optical black region. The pixels arranged in at least the effective pixel region and the optical black region among the plurality of the pixels each include an optical waveguide arranged above the photoelectric converter. The pixels including the optical waveguides are arranged between the effective pixel region and the optical black region so as to be spaced apart from each other by at least a one-pixel pitch.Type: GrantFiled: June 14, 2017Date of Patent: June 11, 2019Assignee: CANON KABUSHIKI KAISHAInventors: Taro Kato, Akira Okita, Takehito Okabe, Takeru Ohya, Kosuke Asano, Koichiro Iwata, Seiichirou Sakai
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Publication number: 20180006071Abstract: An imaging device includes a pixel region in which a plurality of pixels, each including a photoelectric converter, are arranged, including an effective pixel region, an optical black region covered with a light-shielding film, and a dummy pixel region arranged between the effective pixel region and the optical black region. The pixels arranged in at least the effective pixel region and the optical black region among the plurality of the pixels each include an optical waveguide arranged above the photoelectric converter. The pixels including the optical waveguides are arranged between the effective pixel region and the optical black region so as to be spaced apart from each other by at least a one-pixel pitch.Type: ApplicationFiled: June 14, 2017Publication date: January 4, 2018Inventors: Taro Kato, Akira Okita, Takehito Okabe, Takeru Ohya, Kosuke Asano, Koichiro Iwata, Seiichirou Sakai
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Patent number: 9171107Abstract: A calculating method for calculating structural data of a two-level diffractive optical element configured to form a set of light intensity distributions point-symmetrical with respect to an axis on an image plane utilizing an iterative Fourier transform algorithm executed by a computer includes calculating a light intensity distribution and a phase distribution of a plane of the two-level diffractive optical element which has a Fourier transform relationship with the image plane by performing an inverse Fourier transform for a light intensity that is made by removing one of the set of light intensity distributions from the set of light intensity distributions, and calculating structural data of the diffractive optical element based upon the light intensity distribution and the phase distribution which have been calculated.Type: GrantFiled: March 7, 2013Date of Patent: October 27, 2015Assignee: CANON KABUSHIKI KAISHAInventor: Kosuke Asano
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Patent number: 9018672Abstract: Provided is a semiconductor device including: a semiconductor element arranged on a substrate and having two electrodes; a conductive strip in contact with one of the two electrodes; and a dielectric arranged between another one of the two electrodes and the conductive strip, in which the conductive strip has an opening formed therein, the dielectric has a void formed therein, and the opening and the void are connected to each other.Type: GrantFiled: November 15, 2013Date of Patent: April 28, 2015Assignee: Canon Kabushiki KaishaInventors: Ryota Sekiguchi, Alexis Debray, Yasushi Koyama, Kosuke Asano, Satoshi Yokoyama, Atsushi Kemmochi
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Publication number: 20140145280Abstract: Provided is a semiconductor device including: a semiconductor element arranged on a substrate and having two electrodes; a conductive strip in contact with one of the two electrodes; and a dielectric arranged between another one of the two electrodes and the conductive strip, in which the conductive strip has an opening formed therein, the dielectric has a void formed therein, and the opening and the void are connected to each other.Type: ApplicationFiled: November 15, 2013Publication date: May 29, 2014Applicant: CANON KABUSHIKI KAISHAInventors: Ryota Sekiguchi, Alexis Debray, Yasushi Koyama, Kosuke Asano, Satoshi Yokoyama, Atsushi Kemmochi
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Publication number: 20130238296Abstract: A calculating method for calculating structural data of a two-level diffractive optical element configured to form a set of light intensity distributions point-symmetrical with respect to an axis on an image plane utilizing an iterative Fourier transform algorithm executed by a computer includes calculating a light intensity distribution and a phase distribution of a plane of the two-level diffractive optical element which has a Fourier transform relationship with the image plane by performing an inverse Fourier transform for a light intensity that is made by removing one of the set of light intensity distributions from the set of light intensity distributions, and calculating structural data of the diffractive optical element based upon the light intensity distribution and the phase distribution which have been calculated.Type: ApplicationFiled: March 7, 2013Publication date: September 12, 2013Applicant: CANON KABUSHIKI KAISHAInventor: Kosuke Asano
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Patent number: 8309176Abstract: A method for manufacturing a three-dimensional structure includes forming a first structure having a relief pattern on a substrate, forming a sacrifice layer on the first structure such that the sacrifice layer can be filled in a concave part of the first structure and the sacrifice layer can cover a surface of a convex part of the first structure on a side opposite to the substrate, forming a second structure having a relief pattern on the sacrifice layer, and a fourth step of removing the sacrifice layer from between the first structure and the second structure, and thereby bringing the second structure into contact with the surface of the first structure.Type: GrantFiled: June 4, 2009Date of Patent: November 13, 2012Assignee: Canon Kabushiki KaishaInventors: Taisuke Isano, Kosuke Asano, Yasushi Kaneda
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Patent number: 8305683Abstract: A polarizer of the present invention having a higher level of polarization performance for a light in the deep ultraviolet wavelength range includes: a substrate transparent to deep ultraviolet light; and a periodic structure including a plurality of structural elements at predetermined intervals on the substrate, the polarizer being configured so that the deep ultraviolet light incident thereon is split into a light component reflected by the periodic structure and a light component passing between the structural elements adjacent to each other, and the periodic structure being composed of chromium oxide or tungsten.Type: GrantFiled: November 11, 2009Date of Patent: November 6, 2012Assignee: Canon Kabushiki KaishaInventors: Kosuke Asano, Taisuke Isano, Yasushi Kaneda