Patents by Inventor Kosuke GOTO

Kosuke GOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240109552
    Abstract: According to an embodiment, a driving assistance device includes a recognizer configured to recognize a surrounding situation of a mobile object, a decider configured to decide whether or not to prompt a driver of the mobile object to perform acceleration or deceleration on the basis of the surrounding situation, and a notification controller configured to cause a speaker to output a notification sound for prompting the driver of the mobile object to perform the acceleration or deceleration on the basis of a decision result. The notification sound is a notification sound obtained by continuously changing a structure of a sound.
    Type: Application
    Filed: September 27, 2023
    Publication date: April 4, 2024
    Inventors: Kosuke Toda, Yuji Yasui, Takeru Goto, Aya Miura, Kenjiro Torii, Keming Ding
  • Patent number: 11941077
    Abstract: According to one embodiment, a calculating device includes a processor repeating a processing procedure. The processing procedure includes a first variable update and a second variable update. The first variable update includes updating an ith entry of a first variable xi by adding a first function to the ith entry of the first variable xi before the first variable update. The second variable update includes updating the ith entry of the second variable yi by adding a second function and a third function to the ith entry of the second variable yi before the second variable update. The processor performs at least an output of at least one of the ith entry of the first variable xi obtained after the repeating of the processing procedure or a function of the ith entry of the first variable xi obtained after the repeating of the processing procedure.
    Type: Grant
    Filed: October 3, 2022
    Date of Patent: March 26, 2024
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hayato Goto, Kosuke Tatsumura
  • Publication number: 20150171847
    Abstract: A semiconductor device including a control circuit outputting a first clock signal having a first clock cycle in response to a first command signal and outputting a second clock signal having a second clock cycle in response to a second command signal; a first circuit controlled based on the first clock signal; and a second circuit controlled based on the second clock signal.
    Type: Application
    Filed: February 26, 2015
    Publication date: June 18, 2015
    Inventors: Takuyo KODAMA, Kosuke GOTO
  • Patent number: 8971143
    Abstract: Such a device is disclosed that includes a control circuit outputting a first clock signal having a first clock cycle in response to a first command signal and outputting a second clock signal having a second clock cycle in response to a second command signal, a first circuit controlled based on the first clock signal, and a second circuit controlled based on the second clock signal.
    Type: Grant
    Filed: December 8, 2011
    Date of Patent: March 3, 2015
    Assignee: PS4 Luxco S.a.r.l
    Inventors: Takuyo Kodama, Kosuke Goto
  • Patent number: 8659321
    Abstract: A semiconductor device includes a first driver circuit for supplying a first potential to a first power supply node of the sense amplifier, second and third driver circuits for supplying a second potential and a third potential to a second power supply node of the sense amplifier, and a timing control circuit for controlling operations of the first to third driver circuits. The timing control circuit includes a delay circuit for deciding an ON period of the third driver circuit. The delay circuit includes a first delay circuit having a delay amount that depends on an external power supply potential and a second delay circuit having a delay amount that does not depend on the external power supply potential, and the ON period of the third driver circuit is decided based on a sum of the delay amounts of the first and second delay circuits.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: February 25, 2014
    Inventors: Yuko Watanabe, Yoshiro Riho, Hiromasa Noda, Yoji Idei, Kosuke Goto
  • Patent number: 8509024
    Abstract: Such a device is disclosed that includes a terminal, a first voltage generator generating, when activated, a voltage at the terminal and stopping, when deactivated, generating the voltage, and a second voltage generator generating, when activated, the voltage at the terminal and stopping, when deactivated, generating the voltage. The first voltage generator being configured to be activated in response to a first control signal taking an active level and deactivated in response to the first control signal taking an inactive level, and the second voltage generator being configured to be activated in response to each of the first control signal and a second control signal taking an active level and deactivated in response to at least one of the first and second control signal taking an inactive level.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: August 13, 2013
    Assignee: Elpida Memory, Inc.
    Inventors: Kosuke Goto, Takuyo Kodama
  • Publication number: 20120155206
    Abstract: Such a device is disclosed that includes a control circuit outputting a first clock signal having a first clock cycle in response to a first command signal and outputting a second clock signal having a second clock cycle in response to a second command signal, a first circuit controlled based on the first clock signal, and a second circuit controlled based on the second clock signal.
    Type: Application
    Filed: December 8, 2011
    Publication date: June 21, 2012
    Applicant: Elpida Memory, Inc.
    Inventors: Takuyo KODAMA, Kosuke Goto
  • Publication number: 20120140578
    Abstract: Such a device is disclosed that includes a terminal, a first voltage generator generating, when activated, a voltage at the terminal and stopping, when deactivated, generating the voltage, and a second voltage generator generating, when activated, the voltage at the terminal and stopping, when deactivated, generating the voltage. The first voltage generator being configured to be activated in response to a first control signal taking an active level and deactivated in response to the first control signal taking an inactive level, and the second voltage generator being configured to be activated in response to each of the first control signal and a second control signal taking an active level and deactivated in response to at least one of the first and second control signal taking an inactive level.
    Type: Application
    Filed: November 28, 2011
    Publication date: June 7, 2012
    Applicant: Elpida Memory, Inc.
    Inventors: Kosuke Goto, Takuyo Kodama
  • Publication number: 20120133399
    Abstract: A semiconductor device includes a first driver circuit for supplying a first potential to a first power supply node of the sense amplifier, second and third driver circuits for supplying a second potential and a third potential to a second power supply node of the sense amplifier, and a timing control circuit for controlling operations of the first to third driver circuits. The timing control circuit includes a delay circuit for deciding an ON period of the third driver circuit. The delay circuit includes a first delay circuit having a delay amount that depends on an external power supply potential and a second delay circuit having a delay amount that does not depend on the external power supply potential, and the ON period of the third driver circuit is decided based on a sum of the delay amounts of the first and second delay circuits.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 31, 2012
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Yuko WATANABE, Yoshiro RIHO, Hiromasa NODA, Yoji IDEI, Kosuke GOTO