Patents by Inventor Kosuke HORIBE
Kosuke HORIBE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220293529Abstract: A semiconductor device includes: a stacking part in which the plurality of conductor layers are separately stacked in a z direction; a stair part that is arranged alongside the stacking part in a y direction and in which the plurality of conductor layers are extended in the y direction in a stair shape; a first insulating film covering at least part of the stair part; a second insulating film covering at least part of the first insulating film and different from the first insulating film; and a contact connected with one of the plurality of conductor layers and penetrating through the first insulating film and the second insulating film. The linear expansion coefficient of the second insulating film is larger than the linear expansion coefficient of the first insulating film.Type: ApplicationFiled: September 9, 2021Publication date: September 15, 2022Applicant: Kioxia CorporationInventors: Kosuke HORIBE, Kei WATANABE, Shinya OKUDA
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Patent number: 11367624Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film on the first film. The method further includes forming a recess in the first film using the second film as a mask. The second film includes a first layer having carbon and a second layer having carbon formed on the first layer. The second layer has a second carbon density lower than a first carbon density of the first layer.Type: GrantFiled: March 2, 2020Date of Patent: June 21, 2022Assignee: KIOXIA CORPORATIONInventors: Junichi Hashimoto, Kaori Narumiya, Kosuke Horibe, Soichi Yamazaki, Kei Watanabe, Yusuke Kondo, Mitsuhiro Omura, Takehiro Kondoh, Yuya Matsubara, Junya Fujita, Toshiyuki Sasaki
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Patent number: 11361966Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film on the first film. The second film includes fluoride of a first metal element having a first boiling point of 800° C. or higher and fluoride of a second metal element having a second boiling point of 800° C. or higher. The second metal element is different from the first metal element. The method further includes etching the first film using the second film as an etching mask and etching gas that includes fluorine.Type: GrantFiled: February 27, 2020Date of Patent: June 14, 2022Assignee: KIOXIA CORPORATIONInventors: Soichi Yamazaki, Kazuhito Furumoto, Kosuke Horibe, Keisuke Kikutani, Atsuko Sakata
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Publication number: 20210151372Abstract: In one embodiment, the semiconductor device includes a first insulator including Si (silicon) and O (oxygen). The device further includes a first interconnect provided in the first insulator and including a metal element. The device further includes a second insulator provided on the first insulator and the first interconnect and including Si, C (carbon) and N (nitrogen), content of Si—H groups (H represents hydrogen) in the second insulator being 6.0% or less, content of Si—CH3 groups in the second insulator being 0.5% or less. The device further includes a second interconnect provided on the first interconnect in the second insulator and including the metal element.Type: ApplicationFiled: November 18, 2020Publication date: May 20, 2021Applicant: Kioxia CorporationInventors: Shinya OKUDA, Kei WATANABE, Kosuke HORIBE
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Publication number: 20210066090Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film on the first film. The method further includes forming a recess in the first film using the second film as a mask. The second film includes a first layer having carbon and a second layer having carbon formed on the first layer. The second layer has a second carbon density lower than a first carbon density of the first layer.Type: ApplicationFiled: March 2, 2020Publication date: March 4, 2021Applicant: KIOXIA CORPORATIONInventors: Junichi HASHIMOTO, Kaori NARUMIYA, Kosuke HORIBE, Soichi YAMAZAKI, Kei WATANABE, Yusuke KONDO, Mitsuhiro OMURA, Takehiro KONDOH, Yuya MATSUBARA, Junya FUJITA, Toshiyuki SASAKI
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Patent number: 10930665Abstract: A semiconductor device of an embodiment includes a control circuit arranged on a substrate, a first conductive layer arranged on the control circuit and containing a first element as a main component, a multilayer structure arranged on the first conductive layer and configured such that multiple second conductive layers and multiple insulating layers are alternately stacked on each other, a memory layer penetrating the multilayer structure and reaching the first conductive layer at a bottom portion, a first layer arranged between the control circuit and the first conductive layer and containing the first element as a main component, and a second layer arranged between the control circuit and the first layer and containing, as a main component, a second element different from the first element.Type: GrantFiled: August 9, 2019Date of Patent: February 23, 2021Assignee: Toshiba Memory CorporationInventors: Kosuke Horibe, Kei Watanabe, Toshiyuki Sasaki, Tomo Hasegawa, Soichi Yamazaki, Keisuke Kikutani, Jun Nishimura, Hisashi Harada, Hideyuki Kinoshita
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Publication number: 20210020439Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a first film on a substrate. The method further includes forming a second film on the first film. The second film includes fluoride of a first metal element having a first boiling point of 800° C. or higher and fluoride of a second metal element having a second boiling point of 800° C. or higher. The second metal element is different from the first metal element. The method further includes etching the first film using the second film as an etching mask and etching gas that includes fluorine.Type: ApplicationFiled: February 27, 2020Publication date: January 21, 2021Applicant: KIOXIA CORPORATIONInventors: Soichi YAMAZAKI, Kazuhito FURUMOTO, Kosuke HORIBE, Keisuke KIKUTANI, Atsuko SAKATA
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Patent number: 10763122Abstract: A method of manufacturing a semiconductor device includes forming a mask layer including aluminum or an aluminum compound on a layer to be etched comprising at least one first metal selected from tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium, and iridium. The method of manufacturing a semiconductor device further includes patterning the mask layer, and etching the layer to be etched by using the patterned mask layer to form a hole or a groove in the layer to be etched.Type: GrantFiled: September 5, 2017Date of Patent: September 1, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Soichi Yamazaki, Kazuhito Furumoto, Kosuke Horibe, Keisuke Kikutani, Atsuko Sakata, Junichi Wada, Toshiyuki Sasaki
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Publication number: 20200235117Abstract: A semiconductor device of an embodiment includes a control circuit arranged on a substrate, a first conductive layer arranged on the control circuit and containing a first element as a main component, a multilayer structure arranged on the first conductive layer and configured such that multiple second conductive layers and multiple insulating layers are alternately stacked on each other, a memory layer penetrating the multilayer structure and reaching the first conductive layer at a bottom portion, a first layer arranged between the control circuit and the first conductive layer and containing the first element as a main component, and a second layer arranged between the control circuit and the first layer and containing, as a main component, a second element different from the first element.Type: ApplicationFiled: August 9, 2019Publication date: July 23, 2020Applicant: Toshiba Memory CorporationInventors: Kosuke HORIBE, Kei Watanabe, Toshiyuki Sasaki, Tomo Hasegawa, Soichi Yamazaki, Keisuke Kikutani, Jun Nishimura, Hisashi Harada, Hideyuki Kinoshita
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Publication number: 20180261466Abstract: A method of manufacturing a semiconductor device includes forming a mask layer including aluminum or an aluminum compound on a layer to be etched comprising at least one first metal selected from tungsten, tantalum, zirconium, hafnium, molybdenum, niobium, ruthenium, osmium, rhenium, and iridium. The method of manufacturing a semiconductor device further includes patterning the mask layer, and etching the layer to be etched by using the patterned mask layer to form a hole or a groove in the layer to be etched.Type: ApplicationFiled: September 5, 2017Publication date: September 13, 2018Applicant: TOSHIBA MEMORY CORPORATIONInventors: Soichi YAMAZAKI, Kazuhito FURUMOTO, Kosuke HORIBE, Keisuke KIKUTANI, Atsuko SAKATA, Junichi WADA, Toshiyuki SASAKI
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Patent number: 9793293Abstract: A semiconductor device includes a stacked body including a plurality of electrode layers stacked with an insulator interposed; a columnar portion provided in the stacked body and extending in a stacking direction of the electrode layers; and a first separation region provided in the stacked body and extending in a first direction. The stacked body includes a memory cell array and a staircase portion arranged in the first direction, the memory cell array including memory cells provided along the columnar portion, and the staircase portion including a plurality of terraces arranged along the first direction. The first separation region includes a first portion and a second portion in the staircase portion, the first portion having a first width in a second direction crossing the first direction, and the second portion having a second width in the second direction. The second width is narrower than the first width.Type: GrantFiled: March 17, 2017Date of Patent: October 17, 2017Assignee: TOSHIBA MEMORY CORPORATIONInventors: Kosuke Horibe, Shinichi Nakao, Yasuhito Yoshimizu, Kouji Matsuo, Kei Watanabe, Atsuko Sakata
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Patent number: 9754793Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a mask layer on a layer to be etched, the mask layer containing tungsten and boron, a composition ratio of the tungsten being not less than 30%, patterning the mask layer, and performing a dry etching to the layer to be etched using the mask layer being patterned, and forming a hole or a slit in the layer to be etched.Type: GrantFiled: December 12, 2016Date of Patent: September 5, 2017Assignee: TOSHIBA MEMORY CORPORATIONInventors: Shinichi Nakao, Shunsuke Ochiai, Yusuke Oshiki, Kei Watanabe, Mitsuhiro Omura, Kosuke Horibe, Atsuko Sakata, Junichi Wada, Soichi Yamazaki, Masayuki Kitamura, Yuya Matsubara
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Publication number: 20170092505Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a mask layer on a layer to be etched, the mask layer containing tungsten and boron, a composition ratio of the tungsten being not less than 30%, patterning the mask layer, and performing a dry etching to the layer to be etched using the mask layer being patterned, and forming a hole or a slit in the layer to be etched.Type: ApplicationFiled: December 12, 2016Publication date: March 30, 2017Applicant: Kabushiki Kaisha ToshibaInventors: Shinichi NAKAO, Shunsuke OCHIAI, Yusuke OSHIKI, Kei WATANABE, Mitsuhiro OMURA, Kosuke HORIBE, Atsuko SAKATA, Junichi WADA, Soichi YAMAZAKI, Masayuki KITAMURA, Yuya MATSUBARA