Patents by Inventor Kosuke Ijigawa

Kosuke Ijigawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240120017
    Abstract: Provided is a RAM including a first read bit line, a first write bit line, a second read bit line, a second write bit line, a charge circuit configured to charge one of the first and second read bit lines and the first and second write bit lines at a time of short-circuit detection, and a discharge circuit configured to discharge the other of the first and second read bit lines and the first and second write bit lines at the time of the short-circuit detection.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 11, 2024
    Inventors: Kosuke Ijigawa, Kazuhisa Ukai