Abstract: A clock data recovery (CDR) circuit includes a sampling circuit, a synchronization circuit that synchronizes a frequency of an oscillation clock signal from an oscillation circuit with a frequency of input data of a specific pattern which is sampled in the sampling circuit, and synchronizes a phase of the oscillation clock signal with a phase of the sampled input data, and a data pattern recognition circuit that detects whether the input data sampled in the sampling circuit has a specific pattern. The data pattern recognition circuit starts an operation for detecting whether the input data has a specific pattern in response to a frequency lock start instruction. The synchronization circuit starts an operation for synchronizing the frequency on condition that it is determined by the data pattern recognition circuit that the input data has a specific pattern.

Abstract: A clock data recovery (CDR) circuit includes a sampling circuit, a synchronization circuit that synchronizes a frequency of an oscillation clock signal from an oscillation circuit with a frequency of input data of a specific pattern which is sampled in the sampling circuit, and synchronizes a phase of the oscillation clock signal with a phase of the sampled input data, and a data pattern recognition circuit that detects whether the input data sampled in the sampling circuit has a specific pattern. The data pattern recognition circuit starts an operation for detecting whether the input data has a specific pattern in response to a frequency lock start instruction. The synchronization circuit starts an operation for synchronizing the frequency on condition that it is determined by the data pattern recognition circuit that the input data has a specific pattern.

Abstract: The present invention is directed to accurately set a frequency characteristic of a filter integrated in a semiconductor integrated circuit. A semiconductor integrated circuit includes a filter circuit, a cutoff frequency calibration circuit, and a Q-factor calibration circuit. The cutoff frequency calibration circuit adjusts cutoff frequency of the filter circuit to a desired value by adjusting capacitance components of the filter circuit. After adjustment of the cutoff frequency of the filter circuit by the cutoff frequency calibration circuit, the Q-factor calibration circuit adjusts the Q factor of the filter circuit to a desired value by adjusting a resistance component of the filter circuit.

Abstract: The present invention is directed to accurately set a frequency characteristic of a filter integrated in a semiconductor integrated circuit. A semiconductor integrated circuit includes a filter circuit, a cutoff frequency calibration circuit, and a Q-factor calibration circuit. The cutoff frequency calibration circuit adjusts cutoff frequency of the filter circuit to a desired value by adjusting capacitance components of the filter circuit. After adjustment of the cutoff frequency of the filter circuit by the cutoff frequency calibration circuit, the Q-factor calibration circuit adjusts the Q factor of the filter circuit to a desired value by adjusting a resistance component of the filter circuit.