Patents by Inventor Kota Oikawa
Kota Oikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240120140Abstract: A plurality of through-hole conductors include a first through-hole conductor and a second through-hole conductor between coil conductors adjacent each other. Each of the first through-hole conductor and the second through-hole conductor includes a first end and a second end. The first end included in the second through-hole conductor is coupled to the second end included in the first through-hole conductor, and has a width larger than a width of the second end included in the first through-hole conductor. The first end included in the first through-hole conductor has a width larger than the width of the second end included in the first through-hole conductor. The second end included in the second through-hole conductor has a width smaller than the width of the first end included in the second through-hole conductor.Type: ApplicationFiled: June 15, 2023Publication date: April 11, 2024Applicant: TDK CORPORATIONInventors: Noriaki HAMACHI, Toshinori MATSUURA, Junichiro URABE, Kota OIKAWA, Yuto SHIGA, Youichi KAZUTA, Yuichi TAKUBO, Shunya SUZUKI, Xuran GUO, So KOBAYASHI
-
Publication number: 20240112927Abstract: In one embodiment, an etching method includes (a) preparing a substrate having a first region including a first material that contains silicon, and a second region including a second material different from the first material, and (b) etching the first region by plasma generated from a processing gas containing a carbon- and fluorine-containing gas, a nitrogen-containing gas, and a metal halide gas. In (b), a flow rate of the metal halide gas is lower than a flow rate of the carbon- and fluorine-containing gas and a flow rate of the nitrogen-containing gas.Type: ApplicationFiled: October 3, 2023Publication date: April 4, 2024Applicant: Tokyo Electron LimitedInventors: Fumiya TAKATA, Wataru TOGASHI, Kota OIKAWA
-
Publication number: 20240071727Abstract: A substrate processing method includes: (a) providing a substrate including a first region containing a first material including silicon and a second region containing a second material different from the first material; (b) etching the second region while forming a metal-containing layer on the first region, by a plasma generated from a processing gas including halogen and metal; (c) removing the metal-containing layer with a base.Type: ApplicationFiled: August 31, 2023Publication date: February 29, 2024Applicant: Tokyo Electron LimitedInventors: Takuma SATO, Shota YOSHIMURA, Motoki NORO, Hsinkai WANG, Kota OIKAWA
-
Publication number: 20230005753Abstract: An etching method includes: (a) providing a substrate including a first region containing silicon and nitrogen and a second region containing silicon and oxygen; (b) forming a tungsten-containing deposit on the first region using a first plasma generated from a first processing gas containing fluorine, tungsten, and at least one selected from a group consisting of carbon and hydrogen; and (c) after (b), etching the second region using a second plasma generated from a second processing gas different from the first processing gas.Type: ApplicationFiled: July 1, 2022Publication date: January 5, 2023Applicant: Tokyo Electron LimitedInventors: Fumiya TAKATA, Shota YOSHIMURA, Shinya MORIKITA, Kota OIKAWA
-
Patent number: 9768062Abstract: A method for forming a low parasitic capacitance contact to a source-drain structure of a fin field effect transistor device. In some embodiments the method includes etching a long trench down to the source-drain structure, the trench being sufficiently long to extend across all the of source-drain regions of the device. A conductive layer is formed on the source-drain structure, and the trench is filled with a first fill material. A second, narrower trench is opened along a portion of the length of the first trench, and filled with a second fill material. The first fill material may be conductive, and may form the contact. If the first fill material is not conductive, a third trench may be opened, in the portion of the first trench not filled with the second fill material, and filled with a conductive material, to form the contact.Type: GrantFiled: September 26, 2016Date of Patent: September 19, 2017Assignee: Samsung Electronics Co., Ltd.Inventors: Jorge A. Kittl, David Seo, Kota Oikawa, Kim Changhwa, Rwik Sengupta, Mark S. Rodder
-
Patent number: 7446048Abstract: An etching apparatus of the present invention comprises a reaction chamber, a lower electrode placed on the bottom surface of the reaction chamber, an upper electrode placed at the ceiling of the reaction chamber to face the lower electrode, and a focus ring placed on the lower electrode and having a cavity for holding a to-be-processed substrate. The lower surface of the upper electrode is provided, at its middle part, with a recess having a smaller inside diameter than the diameter of the to-be-processed substrate. Thus, in the generation of plasma, the amount of further incident radicals can be reduced in a middle part of the to-be-processed substrate. Therefore, a hole or the like located in the middle part of the to-be-processed substrate can be formed to have a desired shape without having a tapered shape.Type: GrantFiled: January 5, 2005Date of Patent: November 4, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Kota Oikawa
-
Publication number: 20080237728Abstract: A semiconductor device includes: a p-type active region and an n-type active region which are formed in a semiconductor substrate; a first MISFET including a first gate insulating film formed on the p-type active region and a first gate electrode formed on the first gate insulating film and including a first electrode formation film containing a metal element; and a second MISFET including a second gate insulating film formed on the n-type active region and a second gate electrode formed on the second gate insulating film and including a second electrode formation film. The second electrode formation film contains the same metal element as the first electrode formation film and has an oxygen content higher than the first electrode formation film.Type: ApplicationFiled: October 30, 2007Publication date: October 2, 2008Inventors: Riichiro Mitsuhashi, Kota Oikawa, Osullivan Barry, Stefan Kubicek
-
Publication number: 20070181954Abstract: The semiconductor device of present invention is provided with an impurity diffusion region formed in the surface part of a semiconductor layer and a metal silicide layer formed in the surface part of the impurity diffusion region. An interlayer insulating film is formed on the metal silicide layer, and a contact plug that passes through the interlayer insulating film and is electrically connected with the metal silicide layer is formed. The contact plug passing through the interlayer insulating film is formed in a region where the metal silicide layer has a sufficient film thickness, and a recess is formed in the metal silicide layer at the contact hole bottom. Moreover, the contact plug has a projection fitting to the recess of the metal silicide layer in a part of a contact surface with the metal silicide layer.Type: ApplicationFiled: February 8, 2007Publication date: August 9, 2007Inventor: Kota Oikawa
-
Publication number: 20050167050Abstract: An etching apparatus of the present invention comprises a reaction chamber, a lower electrode placed on the bottom surface of the reaction chamber, an upper electrode placed at the ceiling of the reaction chamber to face the lower electrode, and a focus ring placed on the lower electrode and having a cavity for holding a to-be-processed substrate. The lower surface of the upper electrode is provided, at its middle part, with a recess having a smaller inside diameter than the diameter of the to-be-processed substrate. Thus, in the generation of plasma, the amount of further incident radicals can be reduced in a middle part of the to-be-processed substrate. Therefore, a hole or the like located in the middle part of the to-be-processed substrate can be formed to have a desired shape without having a tapered shape.Type: ApplicationFiled: January 5, 2005Publication date: August 4, 2005Inventor: Kota Oikawa