Patents by Inventor Kotaro Horikoshi

Kotaro Horikoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10332795
    Abstract: It is to provide a manufacturing method of a semiconductor device including the following steps of: preparing a semiconductor substrate having a silicon nitride film on the rear surface; forming an interlayer insulating film having a via hole on the main surface of the semiconductor substrate; and forming a via-fill selectively within the via hole. The method further includes the steps of: performing the wafer rear surface cleaning to expose the surface of the silicon nitride film formed on the rear surface of the semiconductor substrate; and thereafter, forming a photoresist film made of chemical amplification type resist on the interlayer insulating film and the via-fill over the main surface of the semiconductor substrate, in which the semiconductor substrate is stored in an atmosphere with the ammonium ion concentration of 1000 ?g/m3 and less.
    Type: Grant
    Filed: August 7, 2017
    Date of Patent: June 25, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kiyoshi Maeshima, Kotaro Horikoshi, Katsuhiko Hotta, Toshiyuki Takahashi, Hironori Ochi, Kenichi Shoji
  • Patent number: 10224214
    Abstract: In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components.
    Type: Grant
    Filed: October 21, 2017
    Date of Patent: March 5, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Kotaro Horikoshi, Toshikazu Hanawa, Masatoshi Akaishi, Yuji Kikuchi
  • Patent number: 10056235
    Abstract: A manufacturing method of a semiconductor device includes the steps of: (a) placing a semiconductor wafer over a stage provided in a chamber, the pressure in the inside of which is reduced by vacuum pumping; and (b) after the step (a), forming plasma in the chamber in a state where the semiconductor wafer is adsorbed and held by the stage, so that desired etching processing is performed on the semiconductor wafer. Herein, before the step (a), O2 gas, negative gas having an electronegativity higher than that of nitrogen gas, is introduced into the chamber to form O2 plasma in the chamber, thereby allowing the charges remaining over the stage to be eliminated.
    Type: Grant
    Filed: April 26, 2017
    Date of Patent: August 21, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Kotaro Horikoshi
  • Publication number: 20180202945
    Abstract: A semiconductor manufacturing apparatus includes: an electrostatic chuck that is installed in a chamber and over which a semiconductor wafer to be subjected to plasma processing is to be mounted; and an observation device for observing a change in a signal waveform occurring in the electrostatic chuck during the plasma processing. The observation device determines abnormal discharge in a processing chamber based on a change pattern of the signal waveform.
    Type: Application
    Filed: December 12, 2017
    Publication date: July 19, 2018
    Inventors: Naoto KANZAKI, Kotaro Horikoshi, Toru Shinaki
  • Publication number: 20180047579
    Abstract: In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components.
    Type: Application
    Filed: October 21, 2017
    Publication date: February 15, 2018
    Inventors: Kotaro HORIKOSHI, Toshikazu HANAWA, Masatoshi AKAISHI, Yuji KIKUCHI
  • Publication number: 20170372876
    Abstract: A manufacturing method of a semiconductor device includes the steps of: (a) placing a semiconductor wafer over a stage provided in a chamber, the pressure in the inside of which is reduced by vacuum pumping; and (b) after the step (a), forming plasma in the chamber in a state where the semiconductor wafer is adsorbed and held by the stage, so that desired etching processing is performed on the semiconductor wafer. Herein, before the step (a), O2 gas, negative gas having an electronegativity higher than that of nitrogen gas, is introduced into the chamber to form O2 plasma in the chamber, thereby allowing the charges remaining over the stage to be eliminated.
    Type: Application
    Filed: April 26, 2017
    Publication date: December 28, 2017
    Inventor: Kotaro HORIKOSHI
  • Publication number: 20170358489
    Abstract: It is to provide a manufacturing method of a semiconductor device including the following steps of: preparing a semiconductor substrate having a silicon nitride film on the rear surface; forming an interlayer insulating film having a via hole on the main surface of the semiconductor substrate; and forming a via-fill selectively within the via hole. The method further includes the steps of: performing the wafer rear surface cleaning to expose the surface of the silicon nitride film formed on the rear surface of the semiconductor substrate; and thereafter, forming a photoresist film made of chemical amplification type resist on the interlayer insulating film and the via-fill over the main surface of the semiconductor substrate, in which the semiconductor substrate is stored in an atmosphere with the ammonium ion concentration of 1000 ?g/m3 and less.
    Type: Application
    Filed: August 7, 2017
    Publication date: December 14, 2017
    Inventors: Kiyoshi MAESHIMA, Kotaro HORIKOSHI, Katsuhiko HOTTA, Toshiyuki TAKAHASHI, Hironori OCHI, Kenichi SHOJI
  • Patent number: 9818620
    Abstract: In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: November 14, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Kotaro Horikoshi, Toshikazu Hanawa, Masatoshi Akaishi, Yuji Kikuchi
  • Patent number: 9761487
    Abstract: It is to provide a manufacturing method of a semiconductor device including the following step of: preparing a semiconductor substrate having a silicon nitride film on the rear surface; forming an interlayer insulating film having a via hole on the main surface of the semiconductor substrate; and forming a via-fill selectively within the via hole. The method further includes the steps of: performing the wafer rear surface cleaning to expose the surface of the silicon nitride film formed on the rear surface of the semiconductor substrate; and thereafter, forming a photoresist film made of chemical amplification type resist on the interlayer insulating film and the via-fill over the main surface of the semiconductor substrate, in which the semiconductor substrate is stored in an atmosphere with the ammonium ion concentration of 1000 ?g/m3 and less.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: September 12, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Kiyoshi Maeshima, Kotaro Horikoshi, Katsuhiko Hotta, Toshiyuki Takahashi, Hironori Ochi, Kenichi Shoji
  • Patent number: 9666445
    Abstract: In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components.
    Type: Grant
    Filed: January 25, 2016
    Date of Patent: May 30, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Kotaro Horikoshi, Toshikazu Hanawa, Masatoshi Akaishi, Yuji Kikuchi
  • Publication number: 20170062250
    Abstract: An asking apparatus includes a load-lock chamber and an apparatus control unit. The load-lock chamber takes in or out a semiconductor wafer to or from a process chamber in which a vacuum process of the semiconductor wafer is performed. The apparatus control unit controls a venting process for putting the load-lock chamber in a vacuum state to an atmospheric state in which the load-lock chamber is opened to atmosphere. Also, the apparatus control unit compares ?1 kPa that is a pressure value previously set and a differential pressure value obtained by subtracting a second pressure value that is a pressure inside the load-lock chamber right after venting to the atmosphere from a first pressure value that is a pressure inside the load-lock chamber right before venting. The apparatus control unit outputs an alarm when the differential pressure value is lower than ?1 kPa that is a pressure value previously set.
    Type: Application
    Filed: July 27, 2016
    Publication date: March 2, 2017
    Inventors: Katsuyoshi KOGURE, Kotaro HORIKOSHI, Kaichiro KOBAYASHI, Kazuyuki OZEKI
  • Patent number: 9559141
    Abstract: Hydrogen plasma processing is performed on a semiconductor wafer having a wiring formed in a region except a photodiode formation region of a pixel part and in a peripheral circuit part, from the side of a face where the wiring is formed. The hydrogen plasma processing uses a plasma etching apparatus which applies high-frequency power to an upper electrode for exciting hydrogen plasma and applies high-frequency power to a lower electrode for supplying hydrogen ions existing in the hydrogen plasma to the semiconductor wafer by electric field drift. Thereby, in the photodiode formation region of the pixel part, hydrogen ions become likely to be supplied by the electric field drift, and, in the region except the photodiode formation region and in the peripheral circuit part, the wiring restricts the movement of hydrogen ions and hydrogen ions become difficult to be supplied.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: January 31, 2017
    Assignee: Renesas Electronics Corporation
    Inventors: Kotaro Horikoshi, Tatsunori Murata
  • Publication number: 20170004976
    Abstract: In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components.
    Type: Application
    Filed: September 16, 2016
    Publication date: January 5, 2017
    Inventors: Kotaro HORIKOSHI, Toshikazu HANAWA, Masatoshi AKAISHI, Yuji KIKUCHI
  • Publication number: 20160365278
    Abstract: It is to provide a manufacturing method of a semiconductor device including the following step of: preparing a semiconductor substrate having a silicon nitride film on the rear surface; forming an interlayer insulating film having a via hole on the main surface of the semiconductor substrate; and forming a via-fill selectively within the via hole. The method further includes the steps of: performing the wafer rear surface cleaning to expose the surface of the silicon nitride film formed on the rear surface of the semiconductor substrate; and thereafter, forming a photoresist film made of chemical amplification type resist on the interlayer insulating film and the via-fill over the main surface of the semiconductor substrate, in which the semiconductor substrate is stored in an atmosphere with the ammonium ion concentration of 1000 ?g/m3 and less.
    Type: Application
    Filed: May 5, 2016
    Publication date: December 15, 2016
    Inventors: Kiyoshi MAESHIMA, Kotaro HORIKOSHI, Katsuhiko HOTTA, Toshiyuki TAKAHASHI, Hironori OCHI, Kenichi SHOJI
  • Publication number: 20160276211
    Abstract: In order to provide a semiconductor device with high reliability while manufacturing cost is being suppressed, dry etching for an insulating film is performed by using mixed gas containing at least CF4 gas and C3H2F4 gas as its components.
    Type: Application
    Filed: January 25, 2016
    Publication date: September 22, 2016
    Inventors: Kotaro HORIKOSHI, Toshikazu HANAWA, Masatoshi AKAISHI, Yuji KIKUCHI
  • Publication number: 20160276212
    Abstract: A semiconductor device is produced while keeping a short circuit margin between its interconnects. A method therefor includes a step in which when a multilayered resist is used to make an interconnect trench in an interlayer dielectric, a mixed gas including, as components thereof, at least CF4 gas, C3H2F4 gas and O2 gas is used to perform dry etching in order to form the multilayered resist.
    Type: Application
    Filed: January 25, 2016
    Publication date: September 22, 2016
    Inventor: Kotaro HORIKOSHI
  • Publication number: 20160064450
    Abstract: In a semiconductor device incorporating a CMOS image sensor, dangling bonds existing at the interface between a semiconductor substrate and an insulating film formed over the semiconductor substrate are selectively terminated with hydrogen. Hydrogen plasma processing is performed on a semiconductor wafer having a wiring formed in a region except a photodiode formation region of a pixel part and in a peripheral circuit part, from the side of a face where the wiring is formed. The hydrogen plasma processing uses a plasma etching apparatus which applies high-frequency power to an upper electrode for exciting hydrogen plasma and applies high-frequency power to a lower electrode for supplying hydrogen ions existing in the hydrogen plasma to the semiconductor wafer by electric field drift.
    Type: Application
    Filed: August 18, 2015
    Publication date: March 3, 2016
    Inventors: Kotaro Horikoshi, Tatsunori Murata