Abstract: A motor control device includes an inverter circuit to convert a DC power source voltage into a three-phase AC voltage and supply the three-phase AC voltage to the three-phase motor and a controller to generate three-phase PWM signals based on three-phase duty command values updated at a predetermined updating cycle and control the inverter circuit based on the three-phase PWM signals. The controller is configured or programmed to shift, when duty command values of at least two phases of the three-phase duty command values updated at a first update timing are the same, the duty command value of one phase of the duty command values of the two phases by a predetermined shift amount and shifts a duty command value of the one phase of the three-phase duty command values updated at a second update timing which is an update timing next to the first update timing by the shift amount in a direction opposite to a shift direction at the first update timing.

Abstract: A power conversion device converts DC power into n-phase AC power. A first voltage and a second voltage lower than the first voltage are applied to the power conversion device, and the power conversion device outputs an n-phase output voltage based on a modulation factor. n is the number of phases of the AC output, and is an odd number of 3 or more. At a low modulation factor equal to or less than a first modulation factor, the output voltage becomes a sinusoidal output. At the second modulation factor larger than the first modulation factor, the output voltage is switched every electrical angle ?/n between the phase in which the output voltage is fixed to the maximum voltage and the phase in which the output voltage is fixed to the minimum voltage.

Abstract: An inverter circuit includes at least three output terminals, a first input terminal, a second input terminal, and at least three series bodies. A total switching duration and a one-phase fixed duration are present within a single cycle of AC output. The waveform of each phase of an output voltage is such that a shared offset wave is deducted from a sinusoidal waveform. The waveform of the offset wave matches one phase of the sinusoidal waveform, or matches a waveform obtained by shifting the one phase of the sinusoidal waveform in the amplitude direction, during the one-phase fixed duration. During switching between the total switching duration and the one-phase fixed duration, the inclination of the waveform of the offset wave either continuously changes or remains fixed.

Abstract: An opposing electrode determination method includes a step of inserting a pair of opposing electrodes into corresponding receiving portions, respectively, by holding, between the pair of opposing electrodes, a held member formed with the receiving portions on both sides; a step of measuring the inter-electrode distance between the pair of opposing electrodes; and a step of determining, based on the inter-electrode distance, whether a combination of the pair of opposing electrodes is correct or incorrect. The receiving portions are configured to have different insertion allowances for the opposing electrodes, respectively, according to the tip shape of each of the pair of opposing electrodes.

Abstract: A motor control device includes an inverter circuit to convert a DC power source voltage into a three-phase AC voltage and supply the three-phase AC voltage to the three-phase motor and a controller to generate three-phase PWM signals based on three-phase duty command values updated at a predetermined updating cycle and control the inverter circuit based on the three-phase PWM signals. The controller is configured or programmed to shift, when duty command values of at least two phases of the three-phase duty command values updated at a first update timing are the same, the duty command value of one phase of the duty command values of the two phases by a predetermined shift amount and shifts a duty command value of the one phase of the three-phase duty command values updated at a second update timing which is an update timing next to the first update timing by the shift amount in a direction opposite to a shift direction at the first update timing.

Abstract: A power supply device is provided with an output unit, an input unit, a rectifier circuit, a switching circuit, and a controller. The input unit inputs an AC input. The rectifier circuit has a smoothing capacitor and converts the AC input into a rectified output. The switching circuit switches between an ON-state in which input impedance is low and an OFF-state in which input impedance is higher than that in the ON-state. The controller sets a modulation ratio such that, when controlling the switching circuit to switch between the ON-state and the OFF-state, at least a portion of a period, in which the modulation width of the modulation duty ratio becomes maximum, is included in a period from a time when an input current inputted to the smoothing capacitor is generated to a time when the voltage of the smoothing capacitor reaches a maximum value.

Abstract: A vehicle body structure in a vehicle rear portion includes a second rear lateral ring-shaped vehicle body framework (RWC2) having a substantially ring shape in a vehicle lateral direction and located near a pair of left and right damper support portions (54) supporting suspension dampers (55) and disposed in rear wheelhouses (52) behind side door openings (Es) in the vehicle. The vehicle body structure includes coupling members (33) coupling a pair of left and right side pillars (42) constituting the second rear lateral ring-shaped vehicle body framework (RWC2) having the substantially ring shape to a pair of left and right wheelhouse reinforcements (53).

Abstract: A driving device is provided with an output unit, an input unit, a rectifier circuit, a switching circuit and a controller. The input unit inputs an AC in put. The rectifier circuit has a smoothing capacitor and converts the AC input into a rectified output. The switching circuit switches between an ON-state in which input impedance is low and an OFF-state in which input impedance is higher than that in the ON-state. The controller sets a start timing such that, when controlling the switching circuit to switch between the ON-state and the OFF-state, at least a portion of a period, in which the start timing of a power supply period becomes a second timing, is included in a period from a time when an input current inputted to the smoothing capacitor is generated to a time when the voltage of the smoothing capacitor reaches a maximum value.

Abstract: A vehicle body structure in a vehicle rear portion includes a second rear lateral ring-shaped vehicle body framework (RWC2) having a substantially ring shape in a vehicle lateral direction and located near a pair of left and right damper support portions (54) supporting suspension dampers (55) and disposed in rear wheelhouses (52) behind side door openings (Es) in the vehicle. The vehicle body structure includes coupling members (33) coupling a pair of left and right side pillars (42) constituting the second rear lateral ring-shaped vehicle body framework (RWC2) having the substantially ring shape to a pair of left and right wheelhouse reinforcements (53).

Abstract: A power supply device is provided with an output unit, an input unit, a rectifier circuit, a switching circuit, and a controller. The input unit inputs an AC input. The rectifier circuit has a smoothing capacitor and converts the AC input into a rectified output. The switching circuit switches between an ON-state in which input impedance is low and an OFF-state in which input impedance is higher than that in the ON-state. The controller sets a modulation ratio such that, when controlling the switching circuit to switch between the ON-state and the OFF-state, at least a portion of a period, in which the modulation width of the modulation duty ratio becomes maximum, is included in a period from a time when an input current inputted to the smoothing capacitor is generated to a time when the voltage of the smoothing capacitor reaches a maximum value.

Abstract: A driving device is provided with an output unit, an input unit, a rectifier circuit, a switching circuit and a controller. The input unit inputs an AC in put. The rectifier circuit has a smoothing capacitor and converts the AC input into a rectified output. The switching circuit switches between an ON-state in which input impedance is low and an OFF-state in which input impedance is higher than that in the ON-state. The controller sets a start timing such that, when controlling the switching circuit to switch between the ON-state and the OFF-state, at least a portion of a period, in which the start timing of a power supply period becomes a second timing, is included in a period from a time when an input current inputted to the smoothing capacitor is generated to a time when the voltage of the smoothing capacitor reaches a maximum value.

Abstract: A transmitting side (101) transmits broadcast content (100) through a communication network (111) or a broadcast network (110). Transmission through the communication network (111) involves an addition of an IP header (100b) to the broadcast content (100) for packetization as an IP packet (100a) and transmission to a terminal device (112) on a receiving side (102). Transmission through the broadcast network (110) involves encapsulation of the IP packet into a given transmission packet (105) used with a digital broadcast signal for transmission to the terminal device on the receiving side (102).

Abstract: An information communication apparatus (100A) that receives transmission information transmitted from a broadcast station, generates and relays response information to an information communication apparatus (100C) having access to a communication network (120) includes: a broadcast-wave I/F that receives the transmission information; a wireless I/F that transmits the response information to the information communication apparatus (100C) capable of wireless communication to relay the response information to an area having access to the communication network (120); a communication network I/F that is connected to the communication network (120) and transmits the response information; a response-transmission-information generating unit that generates the response information; and a connection control unit that determines whether the communication network (120) is accessible, transmits the response information to the communication network (120) when accessible, and relays the response information to the connectab

Abstract: A relay apparatus (110) includes a communication I/F (113) that receives an IP packet from a source terminal (120A) via a communication network (101), a broadcast wave interface (114) that transmits the IP packet received via the communication network I/F (113) to a destination terminal (120B) by a digital broadcast wave, and a receiving and transmitting unit (111) that transmits the IP packet that is received by the communication I/F (113) and transmitted by the transmitting communication terminal (120A) to the destination terminal (120B) via the broadcast wave I/F (114).

Abstract: A content transmitting apparatus includes a content transmitting unit (111) that IP packetizes content to be transmitted through a communication network (101), and an encapsulating unit (112) that encapsulates the content IP packetized by the content transmitting unit (111) to generate a transmission packet to be transmitted through a broadcast network (102) for digital broadcast media. The content transmitting unit (111) and the encapsulating unit (112) transmit plural content items by IP multicast. The content transmitting unit (111) adds, to a header of the content to be IP packetized, information concerning a condition of a receiving side node of the content.

Abstract: A transmitting side (101) transmits broadcast content (100) through a communication network (111) or a broadcast network (110). Transmission through the communication network (111) involves an addition of an IP header (100b) to the broadcast content (100) for packetization as an IP packet (100a) and transmission to a terminal device (112) on a receiving side (102). Transmission through the broadcast network (110) involves encapsulation of the IP packet into a given transmission packet (105) used with a digital broadcast signal for transmission to the terminal device on the receiving side (102).

Abstract: An information communication apparatus (100A) that receives transmission information transmitted from a broadcast station, generates and relays response information to an information communication apparatus (100C) having access to a communication network (120) includes: a broadcast-wave I/F that receives the transmission information; a wireless I/F that transmits the response information to the information communication apparatus (100C) capable of wireless communication to relay the response information to an area having access to the communication network (120); a communication network I/F that is connected to the communication network (120) and transmits the response information; a response-transmission-information generating unit that generates the response information; and a connection control unit that determines whether the communication network (120) is accessible, transmits the response information to the communication network (120) when accessible, and relays the response information to the connectab

Abstract: A content transmitting apparatus includes a content transmitting unit (111) that IP packetizes content to be transmitted through a communication network (101), and an encapsulating unit (112) that encapsulates the content IP packetized by the content transmitting unit (111) to generate a transmission packet to be transmitted through a broadcast network (102) for digital broadcast media. The content transmitting unit (111) and the encapsulating unit (112) transmit plural content items by IP multicast. The content transmitting unit (111) adds, to a header of the content to be IP packetized, information concerning a condition of a receiving side node of the content.

Abstract: A memory element having a large memory window and a high reliability is provided at low cost by performing high speed write and erase operations at a relatively low voltage and suppressing rewrite degradation. A memory element includes a semiconductor layer arranged on an insulating substrate, a first diffusion layer region and a second diffusion layer region having a conductivity type of P-type, a charge accumulating film for covering a channel region between the first diffusion layer region and the second diffusion layer region and being injected with charges from the channel region, and a gate electrode positioned on a side opposite to the channel region with the charge accumulating film in between.

Abstract: A relay apparatus (110) includes a communication I/F (113) that receives an IP packet from a source terminal (120A) via a communication network (101), a broadcast wave interface (114) that transmits the IP packet received via the communication network I/F (113) to a destination terminal (120B) by a digital broadcast wave, and a receiving and transmitting unit (111) that transmits the IP packet that is received by the communication I/F (113) and transmitted by the transmitting communication terminal (120A) to the destination terminal (120B) via the broadcast wave I/F (114).