Patents by Inventor Kotaro Misawa

Kotaro Misawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device having a non-volatile memory transistor formed on a semiconductor
    Patent number: 6921964
    Abstract: A semiconductor device includes a non-volatile memory transistor 100. An interlayer dielectric layer 40 is provided on a semiconductor layer 10 where the non-volatile memory transistor 100 is formed. The interlayer dielectric layer 40 is an insulation layer for electrically isolating a conductive layer 30 formed over the semiconductor layer 10 from the non-volatile memory transistor, and includes a layer 42 containing nitride.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: July 26, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Tomoyuki Furuhata, Kotaro Misawa
  • Semiconductor device and method for manufacturing the same
    Publication number: 20020135012
    Abstract: A semiconductor device includes a non-volatile memory transistor 100. An interlayer dielectric layer 40 is provided on a semiconductor layer 10 where the non-volatile memory transistor 100 is formed. The interlayer dielectric layer 40 is an insulation layer for electrically isolating a conductive layer 30 formed over the semiconductor layer 10 from the non-volatile memory transistor, and includes a layer 42 containing nitride.
    Type: Application
    Filed: February 7, 2002
    Publication date: September 26, 2002
    Inventors: Tomoyuki Furuhata, Kotaro Misawa