Patents by Inventor Kotaro Nimura

Kotaro Nimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040225487
    Abstract: A power supply noise analysis model generator models power supply layers in circuit boards, and includes: a CAD data obtaining section that obtains CAD data; a CAD data conversion section that converts CAD data into data suitable for noise analysis; a power supply pair extraction section that extracts a power supply pair; a mesh division section that divides a power supply pair region into meshes; a ripple processing section that arranges ripples as wave fronts of electromagnetic waves radiated into the power supply pair region from elements thereon; a node layout section that positions plural nodes on the power supply pair region; a node region determination section that determines node regions; an LRC determination section that determines L, R and C connecting the nodes; a power supply layer model generation section that generates a power supply layer model; and a power supply noise analysis model generation section that generates a power supply noise analysis model.
    Type: Application
    Filed: February 26, 2004
    Publication date: November 11, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Yoshiyuki Iwakura, Toshiaki Sato, Kazuyoshi Kanei, Hitoshi Chida, Kotaro Nimura