Patents by Inventor Kotaro Zaima
Kotaro Zaima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11817476Abstract: A semiconductor device includes a semiconductor layer having a first surface in which a plurality of trenches each extending along a first direction are arranged along a second direction perpendicular to the first direction, a first electrode on a second surface of the semiconductor layer, a second electrode on the first surface of the semiconductor layer, and a control electrode inside at least one of the trenches. The plurality of trenches includes first, second, and third trenches. The first and second trenches are connected to each other via a first connector at an end in the first direction of each of the first and second trenches. The third trench extends beyond the end of each of the first and second trenches along the first direction.Type: GrantFiled: February 24, 2021Date of Patent: November 14, 2023Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage CorporationInventors: Kotaro Zaima, Yukie Nishikawa, Emiko Adachi
-
Publication number: 20220077230Abstract: A semiconductor device includes a semiconductor layer, a first electrode on a first surface of the semiconductor layer, a plurality of second electrodes on a second surface of the semiconductor layer, a control electrode between the first electrode and each of the plurality of second electrodes and electrically insulated from the semiconductor layer and each of the plurality of second electrodes, and a resin layer partially covering the second surface of the semiconductor layer and having a plurality of openings through which the respective second electrodes are at least partially exposed. Each of the plurality of openings has rounded corners. The device further includes a sensor element above the second surface of the semiconductor layer and covered by a first part of the resin layer surrounded by the openings.Type: ApplicationFiled: March 1, 2021Publication date: March 10, 2022Inventors: Emiko ADACHI, Yukie NISHIKAWA, Kotaro ZAIMA
-
Publication number: 20220059649Abstract: A semiconductor device includes a semiconductor layer having a first surface in which a plurality of trenches each extending along a first direction are arranged along a second direction perpendicular to the first direction, a first electrode on a second surface of the semiconductor layer, a second electrode on the first surface of the semiconductor layer, and a control electrode inside at least one of the trenches. The plurality of trenches includes first, second, and third trenches. The first and second trenches are connected to each other via a first connector at an end in the first direction of each of the first and second trenches. The third trench extends beyond the end of each of the first and second trenches along the first direction.Type: ApplicationFiled: February 24, 2021Publication date: February 24, 2022Inventors: Kotaro ZAIMA, Yukie NISHIKAWA, Emiko ADACHI
-
Patent number: 11056557Abstract: A semiconductor device includes a semiconductor layer on a first electrode. The semiconductor layer includes a first region of a first type, a second region of a second type, a third region of the second type, and a fourth region of the first type. The second region is above the first region. The third region surrounds the second region. The fourth region surrounds the third region. The second electrode includes a first portion above the second region and a second portion surrounding the first portion. The third electrode surrounds the second electrode and is electrically connected to the fourth region. The semi-insulating layer is electrically connected to the second electrode and the third electrode. A first end portion of the first insulating layer is above the third region.Type: GrantFiled: August 27, 2019Date of Patent: July 6, 2021Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventors: Kazuki Minamikawa, Yukie Nishikawa, Kotaro Zaima
-
Publication number: 20200295128Abstract: A semiconductor device includes a semiconductor layer on a first electrode. The semiconductor layer includes a first region of a first type, a second region of a second type, a third region of the second type, and a fourth region of the first type. The second region is above the first region. The third region surrounds the second region. The fourth region surrounds the third region. The second electrode includes a first portion above the second region and a second portion surrounding the first portion. The third electrode surrounds the second electrode and is electrically connected to the fourth region. The semi-insulating layer is electrically connected to the second electrode and the third electrode. A first end portion of the first insulating layer is above the third region.Type: ApplicationFiled: August 27, 2019Publication date: September 17, 2020Inventors: Kazuki MINAMIKAWA, Yukie NISHIKAWA, Kotaro ZAIMA
-
Publication number: 20160273109Abstract: According to one embodiment, a semiconductor manufacturing apparatus includes a cover part, a gas introduction part provided in the cover part, and a shower plate.Type: ApplicationFiled: August 31, 2015Publication date: September 22, 2016Inventors: Yoshiyuki Harada, Kotaro Zaima, Hidenori Hanyu, Takashi Kataoka
-
Patent number: 9324916Abstract: According to one embodiment, a semiconductor light emitting device includes an electrode layer, a first semiconductor layer, a first elongated electrode, a second semiconductor layer, and a light emitting layer. The first semiconductor layer includes a crystal having a cleavage plane. The first semiconductor layer includes a first thin film portion and a thick film portion. The first thin film portion extends in a first direction perpendicular to a stacking direction from the electrode layer toward the first semiconductor layer. The first thin film portion has a first thickness. The thick film portion is arranged with the first thin film portion in a plane perpendicular to the stacking direction. An angle between the first direction and the cleavage plane is not less than 3 degrees and not more than 27 degrees. The first elongated electrode extends in the first direction in contact with the first thin film portion.Type: GrantFiled: September 29, 2015Date of Patent: April 26, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Jumpei Tajima, Kotaro Zaima, Toshiki Hikosaka, Hiroshi Ono, Naoharu Sugiyama, Shinya Nunoue
-
Publication number: 20160020362Abstract: According to one embodiment, a semiconductor light emitting device includes an electrode layer, a first semiconductor layer, a first elongated electrode, a second semiconductor layer, and a light emitting layer. The first semiconductor layer includes a crystal having a cleavage plane. The first semiconductor layer includes a first thin film portion and a thick film portion. The first thin film portion extends in a first direction perpendicular to a stacking direction from the electrode layer toward the first semiconductor layer. The first thin film portion has a first thickness. The thick film portion is arranged with the first thin film portion in a plane perpendicular to the stacking direction. An angle between the first direction and the cleavage plane is not less than 3 degrees and not more than 27 degrees. The first elongated electrode extends in the first direction in contact with the first thin film portion.Type: ApplicationFiled: September 29, 2015Publication date: January 21, 2016Applicant: Kabushiki Kaisha ToshibaInventors: Jumpei Tajima, Kotaro Zaima, Toshiki Hikosaka, Hiroshi Ono, Naoharu Sugiyama, Shinya Nunoue
-
Patent number: 9209362Abstract: A semiconductor light emitting device has a light emitting element, a first electrode layer, a second electrode layer, a seed electrode layer and a plated layer. The light emitting element has a nitride-based III-V compound semiconductor on a substrate. The light emitting element having a light extraction surface. The first electrode layer on the light extraction surface. The second electrode layer is provided on a surface opposite to the light extraction surface of the light emitting element. The seed electrode layer is configured to cover the entire surface of the second electrode layer. The plated layer is provided on the seed electrode layer. The light emitting element has a light emitting layer, a first conductive type semiconductor layer, and a second conductive type semiconductor layer.Type: GrantFiled: May 22, 2014Date of Patent: December 8, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Toru Gotoda, Toshiyuki Oka, Shinya Nunoue, Kotaro Zaima
-
Patent number: 9178111Abstract: According to one embodiment, a semiconductor light emitting device includes an electrode layer, a first semiconductor layer, a first elongated electrode, a second semiconductor layer, and a light emitting layer. The first semiconductor layer includes a crystal having a cleavage plane. The first semiconductor layer includes a first thin film portion and a thick film portion. The first thin film portion extends in a first direction perpendicular to a stacking direction from the electrode layer toward the first semiconductor layer. The first thin film portion has a first thickness. The thick film portion is arranged with the first thin film portion in a plane perpendicular to the stacking direction. An angle between the first direction and the cleavage plane is not less than 3 degrees and not more than 27 degrees. The first elongated electrode extends in the first direction in contact with the first thin film portion.Type: GrantFiled: November 19, 2013Date of Patent: November 3, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Jumpei Tajima, Kotaro Zaima, Toshiki Hikosaka, Hiroshi Ono, Naoharu Sugiyama, Shinya Nunoue
-
Patent number: 9040322Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor light emitting element. The method can include bonding a stacked main body of a structural body to a substrate main body. The structural body includes a growth substrate and the stacked main body provided on the growth substrate. The stacked main body includes a first nitride semiconductor film, a light emitting film provided on the first nitride semiconductor film, and a second nitride semiconductor film provided on the light emitting film. The method can include removing the growth substrate. The method can include forming a plurality of stacked bodies. The method can include forming an uneven portion in a surface of a first nitride semiconductor layer. The method can include forming a plurality of the semiconductor light emitting elements.Type: GrantFiled: August 31, 2012Date of Patent: May 26, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Taisuke Sato, Kotaro Zaima, Jumpei Tajima, Naoharu Sugiyama, Shinya Nunoue
-
Patent number: 9018654Abstract: According to one embodiment, a semiconductor light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, a light emitting layer, a p-side electrode and an n-side electrode. The p-type semiconductor layer includes a nitride semiconductor and has a first major surface. The n-type semiconductor layer includes a nitride semiconductor and has a second major surface. The light emitting layer is provided between the n-type semiconductor layer and the p-type semiconductor layer. The p-side electrode contacts a part of the p-type semiconductor layer on the first major surface. The n-side electrode contacts a part of the n-type semiconductor layer on the second major surface. The n-side electrode is provided outside and around the p-side electrode in a plan view along a direction from the p-type semiconductor layer to the n-type semiconductor layer.Type: GrantFiled: May 19, 2014Date of Patent: April 28, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Taisuke Sato, Shigeya Kimura, Kotaro Zaima, Koichi Tachibana, Shinya Nunoue
-
Patent number: 9018665Abstract: Certain embodiments provide a method for manufacturing a semiconductor light emitting device, including: providing a first stack film on a first substrate, the first stack film being formed by stacking a p-type nitride semiconductor layer, an active layer having a multiquantum well structure of a nitride semiconductor, and an n-type nitride semiconductor layer in this order; forming an n-electrode on an upper face of the n-type nitride semiconductor layer; and forming a concave-convex region on the upper face of the n-type nitride semiconductor layer by performing wet etching on the upper face of the n-type nitride semiconductor layer with the use of an alkaline solution, except for a region in which the n-electrode is formed.Type: GrantFiled: July 9, 2014Date of Patent: April 28, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kotaro Zaima, Toru Gotoda, Toshiyuki Oka, Shinya Nunoue
-
Patent number: 9006013Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor light emitting device. The method can include forming a nitride semiconductor layer including a light emitting layer on a first substrate having an unevenness, bonding the nitride layer to a second substrate, and separating the first substrate from the nitride layer by irradiating the nitride layer with light. The forming the nitride layer includes leaving a cavity in a space inside a depression of the unevenness while forming a thin film on the depression. The film includes a same material as part of the nitride layer. The separating includes causing the film to absorb part of the light so that intensity of the light applied to a portion of the nitride layer facing the depression is made lower than intensity of the light applied to a portion facing a protrusion of the unevenness.Type: GrantFiled: February 27, 2012Date of Patent: April 14, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Toru Gotoda, Toshiyuki Oka, Shinya Nunoue, Kotaro Zaima, Hiroshi Ono, Hajime Nago
-
Patent number: 8981398Abstract: Certain embodiments provide a semiconductor light emitting device including: a first metal layer; a stack film including a p-type nitride semiconductor layer, an active layer, and an n-type nitride semiconductor layer; an n-electrode; a second metal layer; and a protection film protecting an outer circumferential region of the upper face of the n-type nitride semiconductor layer, side faces of the stack film, a region of an upper face of the second metal layer other than a region in contact with the p-type nitride semiconductor layer, and a region of an upper face of the first metal layer other than a region in contact with the second metal layer. Concavities and convexities are formed in a region of the upper face of the n-type nitride semiconductor layer, the region being outside the region in which the n-electrode is provided and being outside the regions covered with the protection film.Type: GrantFiled: April 15, 2014Date of Patent: March 17, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Kotaro Zaima, Toru Gotoda, Toshiyuki Oka, Shinya Nunoue
-
Publication number: 20140319458Abstract: Certain embodiments provide a method for manufacturing a semiconductor light emitting device, including: providing a first stack film on a first substrate, the first stack film being formed by stacking a p-type nitride semiconductor layer, an active layer having a multiquantum well structure of a nitride semiconductor, and an n-type nitride semiconductor layer in this order; forming an n-electrode on an upper face of the n-type nitride semiconductor layer; and forming a concave-convex region on the upper face of the n-type nitride semiconductor layer by performing wet etching on the upper face of the n-type nitride semiconductor layer with the use of an alkaline solution, except for a region in which the n-electrode is formed.Type: ApplicationFiled: July 9, 2014Publication date: October 30, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Kotaro ZAIMA, Toru Gotoda, Toshiyuki Oka, Shinya Nunoue
-
Publication number: 20140252395Abstract: According to one embodiment, a semiconductor light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, a light emitting layer, a p-side electrode and an n-side electrode. The p-type semiconductor layer includes a nitride semiconductor and has a first major surface. The n-type semiconductor layer includes a nitride semiconductor and has a second major surface. The light emitting layer is provided between the n-type semiconductor layer and the p-type semiconductor layer. The p-side electrode contacts a part of the p-type semiconductor layer on the first major surface. The n-side electrode contacts a part of the n-type semiconductor layer on the second major surface. The n-side electrode is provided outside and around the p-side electrode in a plan view along a direction from the p-type semiconductor layer to the n-type semiconductor layer.Type: ApplicationFiled: May 19, 2014Publication date: September 11, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Taisuke SATO, Shigeya Kimura, Kotaro Zaima, Koichi Tachibana, Shinya Nunoue
-
Patent number: 8822250Abstract: Certain embodiments provide a method for manufacturing a semiconductor light emitting device, including: providing a first stack film on a first substrate, the first stack film being formed by stacking a p-type nitride semiconductor layer, an active layer having a multiquantum well structure of a nitride semiconductor, and an n-type nitride semiconductor layer in this order; forming an n-electrode on an upper face of the n-type nitride semiconductor layer; and forming a concave-convex region on the upper face of the n-type nitride semiconductor layer by performing wet etching on the upper face of the n-type nitride semiconductor layer with the use of an alkaline solution, except for a region in which the n-electrode is formed.Type: GrantFiled: October 31, 2012Date of Patent: September 2, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kotaro Zaima, Toru Gotoda, Toshiyuki Oka, Shinya Nunoue
-
Patent number: 8816367Abstract: According to one embodiment, a semiconductor light emitting device includes first and second electrodes, first and second semiconductor layers and a light emitting layer. The first electrode includes a first region, a second region, and a third region provided between them. The first semiconductor layer includes a first portion on the first region and a second portion on the second region. The light emitting layer includes a third portion on the first portion and a fourth portion on the second portion. The second semiconductor layer includes a fifth portion on the third portion and a sixth portion on the fourth portion. The insulating layer is provided between the first and second portions on the third region and between the third and fourth portions. The second electrode includes a seventh portion provided on the insulating layer, eighth and ninth portions contacting side surfaces of the fifth and sixth portions.Type: GrantFiled: December 26, 2012Date of Patent: August 26, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Jumpei Tajima, Kotaro Zaima, Hiroshi Ono, Shinji Yamada, Shigeya Kimura, Naoharu Sugiyama, Shinya Nunoue
-
Patent number: 8809833Abstract: Certain embodiments provide a method for manufacturing a semiconductor light emitting device, including: providing a first stack film on a first substrate, the first stack film being formed by stacking a p-type nitride semiconductor layer, an active layer having a multiquantum well structure of a nitride semiconductor, and an n-type nitride semiconductor layer in this order; forming an n-electrode on an upper face of the n-type nitride semiconductor layer; and forming a concave-convex region on the upper face of the n-type nitride semiconductor layer by performing wet etching on the upper face of the n-type nitride semiconductor layer with the use of an alkaline solution, except for a region in which the n-electrode is formed.Type: GrantFiled: October 18, 2013Date of Patent: August 19, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Kotaro Zaima, Toru Gotoda, Toshiyuki Oka, Shinya Nunoue