Abstract: Disclosed is a electrical circuit (20) that includes a plurality of integrated circuits (22a,22b,22c,22d). At a distance from the perimeter (30,32) of each integrated circuit are disposed a series of spaced-apart bond pads (28). The integrated circuits are placed on a substrate material (24), such that there exists a plurality of channels (36, 38, 40) between the integrated circuits. Rows and columns of conductive traces are formed on the substrate material. Electrical connections are routed between the bond pads, preferentially using the conductive traces formed in the side channels (36, 38) that lie between the perimeter of an integrated circuit and its associated bond pads. The number of conductive traces routed in central channel (40) is minimized in order to reduce the overall area required for interconnections, thereby maximizing the area available for mounting integrated circuits on the substrate.