Abstract: The phase-looked loop having spread spectrum clock generator of this invention comprises a phase-locked loop and a spread spectrum clock generator. The input signal of the phase-locked loop comes from a reference clock source. The output of the phase-locked loop is used as the standard clock signal and is also supplied to the spread spectrum clock generator, as its input. The spread spectrum clock generator comprises a clock frequency divider, a multiplexer and a counter. The clock frequency divider generates, based on the output of the phase-locked loop, at least tow of a divided-by-M frequency, a divided-by-M+1 frequency and a divided-by-M?1 frequency, which are supplied to the multiplexer. The phase selection of the multiplexer is supplied by the counter, which input is supplied by the output of the multiplexer. The output signal of the multiplexer is supplied to the phase-locked loop, as its feedback clock frequency.