Patents by Inventor Koudai SUGIYAMA

Koudai SUGIYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162871
    Abstract: A main line (transmission line) has a first end and a second end. A sub-line (transmission line) coupled to the main line has a third end and a fourth end. The main line and the sub-line are coupled to each other. A direction of the main line is identical to a direction of the sub-line. An unbalanced node is connected to the first end. The first balanced node is connected to the first end, and the second balanced node is connected to the fourth end. The second end and the third end are connected to a reference potential. A first LC resonant circuit is connected between the first balanced node and the unbalanced node, the second balanced node and the fourth end, or the first end and the unbalanced node.
    Type: Application
    Filed: November 8, 2023
    Publication date: May 16, 2024
    Inventors: Masatoshi HASE, Koudai SUGIYAMA, Masamichi TOKUDA, Seiko NETSU
  • Publication number: 20240162870
    Abstract: A main line (transmission line) having a first end and a second end. A sub-line (transmission line) coupled to the main line. An unbalanced signal is input to and output from an unbalanced node connected to the first end. A balanced signal is input to and output from a first balanced node and a second balanced node. The main line and the sub-line are coupled to each other. A direction of the main line is identical to a direction of the sub-line. The second end and the third end are connected to a reference potential. The first balanced node and the second balanced node are connected to the unbalanced node and the fourth end, respectively. A first LC resonant circuit is connected between the second end and the reference potential or the third end and the reference potential.
    Type: Application
    Filed: November 7, 2023
    Publication date: May 16, 2024
    Inventors: Masatoshi HASE, Koudai SUGIYAMA, Masamichi TOKUDA, Seiko NETSU
  • Publication number: 20240146271
    Abstract: A first transmission line transformer receives and outputs an unbalanced signal and performs impedance transformation. A second transmission line transformer performs unbalanced-to-balanced transformation. The first transmission line transformer includes a first main line and a first sub-line. The direction of the first main line is identical to the direction of the first sub-line. An end of the first sub-line is grounded. An end of the first main line is coupled to the unbalanced-signal input/output node. The second transmission line transformer includes a second main line and a second sub-line. The direction of the second main line is identical to a direction of the second sub-line. An end of the second main line and the second sub-line are grounded. An end of the second main line and the second sub-line are coupled to the balanced-signal input/output nodes.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 2, 2024
    Inventors: Masatoshi HASE, Koudai SUGIYAMA, Masamichi TOKUDA, Seiko NETSU
  • Publication number: 20220294398
    Abstract: An amplification circuit includes a first amplifier provided between an input terminal and an output terminal and a second amplifier connected in parallel with the first amplifier between the input terminal and the output terminal. The first amplifier includes a transistor and a transistor, which are cascode connected with each other. The second amplifier includes a transistor. The transistor has a gate connected to the input terminal, a source connected to ground, and a drain. The transistor has a gate, a source connected to the drain of the transistor, and a drain connected to the output terminal. The transistor has a gate connected to the input terminal, a source connected to ground, and a drain connected to the output terminal.
    Type: Application
    Filed: June 1, 2022
    Publication date: September 15, 2022
    Inventor: Koudai SUGIYAMA
  • Publication number: 20220209723
    Abstract: An amplifier circuit includes an input terminal, an output terminal, an amplifier including a first transistor and a second transistor that are connected in parallel, a first capacitor, and a second capacitor, and an inductor. Each of the first transistor and the second transistor has a gate connected to the input terminal, a source connected to ground, and a drain connected to the output terminal. The inductor is provided between the input terminal and a node of parallel connection of the first transistor and the second transistor on the side of the input terminal. The first capacitor is arranged in a path connecting the node and the gate of the first transistor, the second capacitor is arranged in a path connecting the node and the gate of the second transistor, and the capacitance of the first capacitor differs from the capacitance of the second capacitor.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 30, 2022
    Inventor: Koudai SUGIYAMA