Patents by Inventor Kouei Yamada

Kouei Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11030107
    Abstract: Examples include storage class memory (SCM) queue depth threshold adjustment. Examples may adjust the SCM queue depth threshold of a controller based on whether an IO request latency threshold for an SCM read cache is exceeded. Examples may determine whether to process an IO request using the SCM read cache based on an SCM queue depth of the controller and the SCM queue depth threshold.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: June 8, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gurinder Shergill, Kouei Yamada
  • Patent number: 10922233
    Abstract: Examples include storage class memory (SCM) queue depth threshold adjustment. Examples may adjust the SCM queue depth threshold of a controller based on whether an IO request latency threshold for an SCM read cache is exceeded. Examples may determine whether to process an IO request using the SCM read cache based on an SCM queue depth of the controller and the SCM queue depth threshold.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: February 16, 2021
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gurinder Shergill, Kouei Yamada
  • Publication number: 20200334163
    Abstract: Examples include storage class memory (SCM) queue depth threshold adjustment. Examples may adjust the SCM queue depth threshold of a controller based on whether an IO request latency threshold for an SCM read cache is exceeded. Examples may determine whether to process an IO request using the SCM read cache based on an SCM queue depth of the controller and the SCM queue depth threshold.
    Type: Application
    Filed: April 19, 2019
    Publication date: October 22, 2020
    Inventors: Gurinder Shergill, Kouei Yamada
  • Patent number: 10776276
    Abstract: Examples may bypass storage class memory (SCM) read cache based on a queue depth threshold. Examples may adjust a queue depth threshold for an SCM read cache based on an amount of data read from and written to the SCM read cache in a time period, and may bypass the SCM read cache based on a comparison of a number of outstanding IOs for the SCM read cache to a queue depth threshold for the SCM read cache.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: September 15, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gurinder Shergill, Kouei Yamada
  • Patent number: 10705968
    Abstract: Examples may bypass storage class memory (SCM) read cache based on a queue depth threshold. Examples may adjust a queue depth threshold for an SCM read cache based on an amount of data read from and written to the SCM read cache in a time period, and may bypass the SCM read cache based on a comparison of a number of outstanding IOs for the SCM read cache to a queue depth threshold for the SCM read cache.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: July 7, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gurinder Shergill, Kouei Yamada
  • Publication number: 20200174938
    Abstract: Examples may bypass storage class memory (SCM) read cache based on a queue depth threshold. Examples may adjust a queue depth threshold for an SCM read cache based on an amount of data read from and written to the SCM read cache in a time period, and may bypass the SCM read cache based on a comparison of a number of outstanding IOs for the SCM read cache to a queue depth threshold for the SCM read cache.
    Type: Application
    Filed: November 30, 2018
    Publication date: June 4, 2020
    Inventors: Gurinder Shergill, Kouei Yamada
  • Publication number: 20170168756
    Abstract: A system that includes a plurality of nodes configured to execute storage transactions. The nodes include a first node and a plurality of other nodes. The storage transactions are grouped into transaction sets that are to be executed in a predetermined order that ensures that dependencies between the transactions are observed. A cluster sequencer that resides on the first node is configured to increment a sequence number that identifies an active transaction set of the transaction sets and send the sequence number from the first node to the plurality of other nodes. Upon receipt of the sequence number, each one of the plurality of other nodes begins executing the transactions of the active transaction set without waiting for confirmation that all of the plurality of other nodes have the same sequence number.
    Type: Application
    Filed: July 29, 2014
    Publication date: June 15, 2017
    Inventors: Kouei Yamada, Siamak Nazari, Brian Rutledge, Jianding Luo, Jin Wang, Mark Doherty, Richard Dalzell, Peter Hynes