Patents by Inventor Kouhei Miura

Kouhei Miura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8969851
    Abstract: The present invention provides an image pickup device used to capture an image of an object by receiving light in a near infrared region reflected from the object. The image pickup device includes semiconductor light-receiving elements each having a light-receiving layer with a band gap wavelength of 1.65 to 3.0 ?m.
    Type: Grant
    Filed: December 10, 2010
    Date of Patent: March 3, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Yasuhiro Iguchi, Youichi Nagai, Hiroki Mori, Kouhei Miura
  • Patent number: 8642943
    Abstract: A light-receiving element includes an InP substrate 1, a light-receiving layer 3 having an MQW and located on the InP substrate 1, a contact layer 5 located on the light-receiving layer 3, a p-type region 6 extending from a surface of the contact layer 5 to the light-receiving layer, and a p-side electrode 11 that forms an ohmic contact with the p-type region. The light-receiving element is characterized in that the MQW has a laminated structure including pairs of an InxGa1-xAs (0.38?x?0.68) layer and a GaAs1-ySby (0.25?y?0.73) layer, and in the GaAs1-ySby layer, the Sb content y in a portion on the InP substrate side is larger than the Sb content y in a portion on the opposite side.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: February 4, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroki Mori, Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai, Kouhei Miura, Hideaki Nakahata, Katsushi Akita, Takashi Ishizuka, Kei Fujii
  • Patent number: 8410524
    Abstract: Affords Group III nitride semiconductor devices in which the leakage current from the Schottky electrode can be reduced. In a high electron mobility transistor 11, a supporting substrate 13 is composed of AlN, AlGaN, or GaN, specifically. An AlYGa1?YN epitaxial layer 15 has a full-width-at-half maximum of (0002) plane XRD of 150 sec or less. A GaN epitaxial layer 17 is provided between the gallium nitride supporting substrate and the AlYGa1?YN epitaxial layer (0<Y?1). A Schottky electrode 19 is provided on the AlYGa1?YN epitaxial layer 15. The Schottky electrode 19 constitutes a gate electrode of the high electron mobility transistor 11. The source electrode 21 is provided on the gallium nitride epitaxial layer 15. The drain electrode 23 is provided on the gallium nitride epitaxial layer 15.
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: April 2, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tatsuya Tanabe, Kouhei Miura, Makoto Kiyama, Takashi Sakurada
  • Publication number: 20130048838
    Abstract: A light-receiving element includes an InP substrate 1, a light-receiving layer 3 having an MQW and located on the InP substrate 1, a contact layer 5 located on the light-receiving layer 3, a p-type region 6 extending from a surface of the contact layer 5 to the light-receiving layer, and a p-side electrode 11 that forms an ohmic contact with the p-type region. The light-receiving element is characterized in that the MQW has a laminated structure including pairs of an InxGa1-xAs (0.38?x?0.68) layer and a GaAs1-ySby (0.25?y?0.73) layer, and in the GaAs1-ySby layer, the Sb content y in a portion on the InP substrate side is larger than the Sb content y in a portion on the opposite side.
    Type: Application
    Filed: December 3, 2010
    Publication date: February 28, 2013
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroki Mori, Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai, Kouhei Miura, Hideaki Nakahata, Katsushi Akita, Takashi Ishizuka, Kei Fujii
  • Publication number: 20110147707
    Abstract: The present invention provides an image pickup device used to capture an image of an object by receiving light in a near infrared region reflected from the object. The image pickup device includes semiconductor light-receiving elements each having a light-receiving layer with a band gap wavelength of 1.65 to 3.0 ?m.
    Type: Application
    Filed: December 10, 2010
    Publication date: June 23, 2011
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hiroshi INADA, Yasuhiro IGUCHI, Youichi NAGAI, Hiroki MORI, Kouhei MIURA
  • Patent number: 7884393
    Abstract: Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor (11) is provided with a supporting substrate (13) composed of gallium nitride, a buffer layer (15) composed of a first gallium nitride semiconductor, a channel layer (17) composed of a second gallium nitride semiconductor, a semiconductor layer (19) composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode (21), a source electrode (23) and a drain electrode (25) for the transistor (11). The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm?3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm?3.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: February 8, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Hashimoto, Makoto Kiyama, Takashi Sakurada, Tatsuya Tanabe, Kouhei Miura, Tomihito Miyazaki
  • Patent number: 7875906
    Abstract: The invention offers a photodetector that has an N-containing InGaAs-based absorption layer having a sensitivity in the near-infrared region and that suppresses the dark current and a production method thereof. The photodetector is provided with an InP substrate 1, an N-containing InGaAs-based absorption layer 3 positioned above the InP substrate 1, a window layer 5 positioned above the N-containing InGaAs-based absorption layer 3, and an InGaAs buffer layer 4 positioned between the N-containing InGaAs-based absorption layer 3 and the window layer 5.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: January 25, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Yasuhiro Iguchi, Kouhei Miura
  • Patent number: 7872285
    Abstract: Affords epitaxial substrates for vertical gallium nitride semiconductor devices that have a structure in which a gallium nitride film of n-type having a desired low carrier concentration can be provided on a gallium nitride substrate of n type. A gallium nitride epitaxial film (65) is provided on a gallium nitride substrate (63). A layer region (67) is provided in the gallium nitride substrate (63) and the gallium nitride epitaxial film (65). An interface between the gallium nitride substrate (43) and the gallium nitride epitaxial film (65) is positioned in the layer region (67). In the layer region (67), a peak value of donor impurity along an axis from the gallium nitride substrate (63) to the gallium nitride epitaxial film (65) is 1×1018 cm?3 or more. The donor impurity is at least either silicon or germanium.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: January 18, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Hashimoto, Makoto Kiyama, Tatsuya Tanabe, Kouhei Miura, Takashi Sakurada
  • Publication number: 20100230723
    Abstract: Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor (11) is provided with a supporting substrate (13) composed of gallium nitride, a buffer layer (15) composed of a first gallium nitride semiconductor, a channel layer (17) composed of a second gallium nitride semiconductor, a semiconductor layer (19) composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode (21), a source electrode (23) and a drain electrode (25)) for the transistor (11). The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm?3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm?3.
    Type: Application
    Filed: May 25, 2010
    Publication date: September 16, 2010
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Hashimoto, Makoto Kiyama, Takashi Sakurada, Tatsuya Tanabe, Kouhei Miura, Tomihito Miyazaki
  • Patent number: 7763892
    Abstract: Affords a Group III nitride semiconductor device having a structure that can improve the breakdown voltage. A Schottky diode (11) consists of a Group III nitride support substrate (13), a gallium nitride region (15), and a Schottky electrode (17). The Group III nitride support substrate (13) has electrical conductivity. The Schottky electrode (17) forms a Schottky junction on the gallium nitride region (15). The gallium nitride region (15) is fabricated on a principal face (13a) of the Group III nitride support substrate (13). The gallium nitride region (15) has a (10 12)-plane XRD full-width-at-half-maximum of 100 sec or less.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: July 27, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kouhei Miura, Makoto Kiyama, Takashi Sakurada
  • Patent number: 7749828
    Abstract: Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor 11 is provided with a supporting substrate 13 composed of gallium nitride, a buffer layer 15 composed of a first gallium nitride semiconductor, a channel layer 17 composed of a second gallium nitride semiconductor, a semiconductor layer 19 composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode 21, a source electrode 23 and a drain electrode 25) for the transistor 11. The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm?3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm?3.
    Type: Grant
    Filed: March 3, 2006
    Date of Patent: July 6, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Shin Hashimoto, Makoto Kiyama, Takashi Sakurada, Tatsuya Tanabe, Kouhei Miura, Tomihito Miyazaki
  • Publication number: 20090194796
    Abstract: Affords epitaxial substrates for vertical gallium nitride semiconductor devices that have a structure in which a gallium nitride film of n-type having a desired low carrier concentration can be provided on a gallium nitride substrate of n type. A gallium nitride epitaxial film (65) is provided on a gallium nitride substrate (63). A layer region (67) is provided in the gallium nitride substrate (63) and the gallium nitride epitaxial film (65). An interface between the gallium nitride substrate (43) and the gallium nitride epitaxial film (65) is positioned in the layer region (67). In the layer region (67), a peak value of donor impurity along an axis from the gallium nitride substrate (63) to the gallium nitride epitaxial film (65) is 1×1018 cm?3 or more. The donor impurity is at least either silicon or germanium.
    Type: Application
    Filed: March 1, 2006
    Publication date: August 6, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Hashimoto, Makoto Kiyama, Tatsuya Tanabe, Kouhei Miura, Takashi Sakurada
  • Publication number: 20090189186
    Abstract: Affords Group III nitride semiconductor devices in which the leakage current from the Schottky electrode can be reduced. In a high electron mobility transistor 11, a supporting substrate 13 is composed of AlN, AlGaN, or GaN, specifically. An AlYGa1?YN epitaxial layer 15 has a full-width-at-half maximum of (0002) plane XRD of 150 sec or less. A GaN epitaxial layer 17 is provided between the gallium nitride supporting substrate and the AlYGa1?YN epitaxial layer (O<Y?1). A Schottky electrode 19 is provided on the AlYGa1?YN epitaxial layer 15. The Schottky electrode 19 constitutes a gate electrode of the high electron mobility transistor 11. The source electrode 21 is provided on the gallium nitride epitaxial layer 15. The drain electrode 23 is provided on the gallium nitride epitaxial layer 15.
    Type: Application
    Filed: March 6, 2006
    Publication date: July 30, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tatsuya Tanabe, Kouhei Miura, Makoto Kiyama, Takashi Sakurada
  • Publication number: 20090189190
    Abstract: Affords high electron mobility transistors having a high-purity channel layer and a high-resistance buffer layer. A high electron mobility transistor 11 is provided with a supporting substrate 13 composed of gallium nitride, a buffer layer 15 composed of a first gallium nitride semiconductor, a channel layer 17 composed of a second gallium nitride semiconductor, a semiconductor layer 19 composed of a third gallium nitride semiconductor, and electrode structures (a gate electrode 21, a source electrode 23 and a drain electrode 25) for the transistor 11. The band gap of the third gallium nitride semiconductor is broader than that of the second gallium nitride semiconductor. The carbon concentration NC1 of the first gallium nitride semiconductor is 4×1017 cm?3 or more. The carbon concentration NC2 of the second gallium nitride semiconductor is less than 4×1016 cm?3.
    Type: Application
    Filed: March 3, 2006
    Publication date: July 30, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Shin Hashimoto, Makoto Kiyama, Takashi Sakurada, Tatsuya Tanabe, Kouhei Miura, Tomihito Miyazaki
  • Publication number: 20090057721
    Abstract: A manufacturing method and a semiconductor device produced by the method are provided, in which the semiconductor device can easily be manufactured while the hydrogen concentration is decreased. An N-containing InGaAs layer 3 is grown on an InP substrate by the MBE method, and thereafter a heat treatment is provided at a temperature in the range of 600° C. or more and less than 800° C., whereby the average hydrogen concentration of the N-containing InGaAs layer 3 is made equal to or 2×1017/cm3 or less than.
    Type: Application
    Filed: September 2, 2008
    Publication date: March 5, 2009
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Kouhei Miura, Yasuhiro Iguchi
  • Publication number: 20090001412
    Abstract: The invention offers a photodetector that has an N-containing InGaAs-based absorption layer having a sensitivity in the near-infrared region and that suppresses the dark current and a production method thereof. The photodetector is provided with an InP substrate 1, an N-containing InGaAs-based absorption layer 3 positioned above the InP substrate 1, a window layer 5 positioned above the N-containing InGaAs-based absorption layer 3, and an InGaAs buffer layer 4 positioned between the N-containing InGaAs-based absorption layer 3 and the window layer 5.
    Type: Application
    Filed: June 27, 2008
    Publication date: January 1, 2009
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Yasuhiro Iguchi, Kouhei Miura
  • Publication number: 20080315209
    Abstract: Affords a Group III nitride semiconductor device having a structure that can improve the breakdown voltage. A Schottky diode (11) consists of a Group III nitride support substrate (13), a gallium nitride region (15), and a Schottky electrode (17). The Group III nitride support substrate (13) has electrical conductivity. The Schottky electrode (17) forms a Schottky junction on the gallium nitride region (15). The gallium nitride region (15) is fabricated on a principal face (13a) of the Group III nitride support substrate (13). The gallium nitride region (15) has a (10 12)-plane XRD full-width-at-half-maximum of 100 sec or less.
    Type: Application
    Filed: January 20, 2006
    Publication date: December 25, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kouhei Miura, Makoto Kiyama, Takashi Sakurada
  • Publication number: 20080265258
    Abstract: Affords Group III nitride semiconductor devices in which the leakage current from the Schottky electrode can be decreased. In a high electron mobility transistor 1, a supporting substrate 3 is composed of AlN, AlGaN, or GaN. An AlyGa1-yN epitaxial layer 5 has a surface roughness (RMS) of 0.25 mm or less, wherein the surface roughness is defined by a square area measuring 1 ?m per side. A GaN epitaxial layer 7 is provided between the AlyGa1-yN supporting substrate 3 and the AlyGa1-yN epitaxial layer 5. A Schottky electrode 9 is provided on the AlyGa1-yN epitaxial layer 5. A first ohmic electrode 11 is provided on the AlyGa1-yN epitaxial layer 5. A second ohmic electrode 13 is provided on the AlyGa1-yN epitaxial layer 5. One of the first and second ohmic electrodes 11 and 13 constitutes a source electrode, and the other constitutes a drain electrode. The Schottky electrode 9 constitutes a gate electrode of the high electron mobility transistor 1.
    Type: Application
    Filed: March 3, 2006
    Publication date: October 30, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tatsuya Tanabe, Makoto Kiyama, Kouhei Miura, Takashi Sakurada
  • Patent number: 7387678
    Abstract: A GaN substrate comprises a GaN single crystal substrate, an AlxGa1-xN intermediate layer (0<x?1) epitaxially grown on the substrate, and an GaN epitaxial layer grown on the intermediate layer. The intermediate layer is made of AlGaN and this AlGaN grows over the entire surface of the substrate with contaminants thereon and high dislocation regions therein. Thus, the intermediate layer is normally grown on the substrate, and a growth surface of the intermediate layer can be made flat. Since the growth surface is flat, a growth surface of the GaN epitaxial layer epitaxially grown on the intermediate layer is also flat.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: June 17, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsushi Akita, Eiryo Takasuka, Masahiro Nakayama, Masaki Ueno, Kouhei Miura, Takashi Kyono
  • Publication number: 20040262624
    Abstract: A GaN substrate comprises a GaN single crystal substrate, an AlxGa1-xN intermediate layer (0<x≦1) epitaxially grown on the substrate, and an GaN epitaxial layer grown on the intermediate layer. The intermediate layer is made of AlGaN and this AlGaN grows over the entire surface of the substrate with contaminants thereon and high dislocation regions therein. Thus, the intermediate layer is normally grown on the substrate, and a growth surface of the intermediate layer can be made flat. Since the growth surface is flat, a growth surface of the GaN epitaxial layer epitaxially grown on the intermediate layer is also flat.
    Type: Application
    Filed: June 25, 2004
    Publication date: December 30, 2004
    Inventors: Katsushi Akita, Eiryo Takasuka, Masahiro Nakayama, Masaki Ueno, Kouhei Miura, Takashi Kyono