Abstract: An ATM switch in which the throughput is improved by the simplified arbitration scheme and circuit configuration. This ATM switch uses a matrix type switch formed by N input lines for transmitting the cells read out from the input buffers, M output lines for transmitting the cells to be written into the output buffers, and N.times.M crosspoints located at intersections of the input lines and the output lines, where each crosspoint at an intersection of one input line and one output line carries out an arbitration operation in which a cell arriving from an upper stream side of that one output line is passed to a lower stream side of that one output line with a higher priority than a cell arriving from that one input line, and tile cell arriving from that one input line is transferred to the lower stream side of that one output line only when there is no cell arriving from the upper stream side of that one output line.