Patents by Inventor Kouichi Igura

Kouichi Igura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Image processing circuit and image processing method
    Patent number: 7978383
    Abstract: A circuit and method for processing an image to correct the pixel value of a sub-pixel included in color data to reduce color differences. The image processing circuit includes a plurality of defect determination circuits respectively corresponding to a plurality of sub-pixels (colors). Each defect determination circuit determines whether or not the corresponding sub-pixel, or first sub-pixel, includes a defect and generates a determination signal. The defect determination circuits provide each of a plurality of correction circuits respectively corresponding to a plurality of sub-pixels (colors) with the determination signals. Each correction circuit generates a corrected value for the corresponding first sub-pixel when at least one of the determination signal is indicative of a defect.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: July 12, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kouichi Igura, Tomohiro Fukuoka
  • Image processing circuit and image processing method
    Publication number: 20070139740
    Abstract: A circuit and method for processing an image to correct the pixel value of a sub-pixel included in color data to reduce color differences. The image processing circuit includes a plurality of defect determination circuits respectively corresponding to a plurality of sub-pixels (colors). Each defect determination circuit determines whether or not the corresponding sub-pixel, or first sub-pixel, includes a defect and generates a determination signal. The defect determination circuits provide each of a plurality of correction circuits respectively corresponding to a plurality of sub-pixels (colors) with the determination signals. Each correction circuit generates a corrected value for the corresponding first sub-pixel when at least one of the determination signal is indicative of a defect.
    Type: Application
    Filed: December 20, 2006
    Publication date: June 21, 2007
    Inventors: Kouichi Igura, Tomohiro Fukuoka