Patents by Inventor Kouichi Kumon

Kouichi Kumon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050165765
    Abstract: The information search system includes a sub database creation unit for creating a plurality of sub databases each having a size equal to or less than the capacity of memory devices provided in the information processing apparatuses, an allocation management unit for allocating the sub databases to the information processing apparatuses as sub search requests and a coupling unit for acquiring results of processing as to the sub search requests issued by the information processing apparatuses and coupling them. Accordingly, when a search request to the database is processed by the plurality of information processing apparatuses in parallel, the information processing apparatuses can process the search request at high speeds, thereby the database can be searched at high speeds.
    Type: Application
    Filed: March 1, 2005
    Publication date: July 28, 2005
    Applicant: Fujitsu Limited
    Inventors: Akira Neruse, Kouichi Kumon
  • Patent number: 6918009
    Abstract: In the case that at the time of generation of a pre-fetch request following a read request from one of the processors the data stored in other cache devices cannot be read unless its state tag is changed, a cache controller carries out weak read operation for causing failure in the pre-fetch request as a fetch protocol. Alternatively, the cache controller reads pre-fetch data without changing state tags of other cache devices, sets a weak read state (W), and stores the data. The data in the weak read state (W) is invalided by synchronization operation of memory consistency by software. Furthermore, the pre-fetch data is stored in a passive preservation mode in the present cache device. Even if the pre-fetch data corresponds to a read request from some other cache device, the preservation of the data is not informed to the other cache device.
    Type: Grant
    Filed: December 18, 1998
    Date of Patent: July 12, 2005
    Assignee: Fujitsu Limited
    Inventors: Mitsuru Sato, Kouichi Kumon
  • Publication number: 20040210723
    Abstract: A computer has a plurality of processors with a cache memory. When a spinwait detecting unit provided to a processor detects execution of a spinwait command, it instructs monitoring of a variable value as a spinwait end condition and changes an operating state of a processor. A value change detecting unit provided to the cache memory monitors the variable value specified by the spinwait detecting unit, and when it detects that the variable value is changed, it posts the value change to the processor so as to return the operating state into its original state.
    Type: Application
    Filed: May 10, 2004
    Publication date: October 21, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Akira Naruse, Kouichi Kumon, Mitsuru Sato
  • Patent number: 6678886
    Abstract: A system and method enable appropriately concentrating instruction strings or data pieces sporadically present in a plurality of regions over more than one compilation unit and adjusting the front-and-rear relationship of executed instruction strings without changing the program compilation unit such as a file, subroutine, or function and also without creating a link processing program for batch processing of the system as a whole. Different section names are given to the executed instruction strings and the unexecuted instruction strings and the referenced data and the unreferenced data of an object program respectively. When an execution module is generated from the object program by linking, the sections having an executed section name and the sections having an unexecuted section name in a plurality of files may be aggregated respectively to divide the instructions into an execution portion and an unexecution portion.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: January 13, 2004
    Assignee: Fujitsu Limited
    Inventor: Kouichi Kumon
  • Patent number: 6540219
    Abstract: A paper feed apparatus having a pickup mechanism to pick up a plurality of paper sheets stacked on a chute one by one from the bottom and carrying the paper sheets to a predetermined standby position, comprises a gate 2 disposed facing a pickup roller 1 almost vertically with respect to the direction of paper feed to form a predetermined clearance, a paper-sheet separating pad 3 disposed in sliding contact with the pickup roller 1 to pick up the paper placed on the standby position one by one, and a pickup arm 4 that can be driven to be moved upward when setting paper sheets and downward when feeding paper sheets to push from above the paper sheets stacked on a chute 13 near a paper-sheet feed port. The pickup arm 4,when brought into free state as the planetary gear 5 disengages from the drive power transmission system, pushes paper sheets with a pushing force that increases with increases in the number of paper sheets stacked on the chute 13.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: April 1, 2003
    Assignee: PFU Limited
    Inventors: Akira Naruse, Kouichi Kumon, Mitsuru Sato
  • Patent number: 6526480
    Abstract: The invention relates to cache apparatuses and a control method for managing cache memories in a multiprocessor system. A cache controller holds data which has to be invalidated for a cache coherence as data in a status where the validity is unknown, causes a cache hit in response to a reading request from a processor, provides the data as speculation data, and allows the processor to speculatively process the data. Therefore, since the data which has to be obtained from another cache or a main storage due to the invalidation is held in an Unknown status, a cache hit occurs. Thus, a data waiting time of the processor can be shortened.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: February 25, 2003
    Assignee: Fujitsu Limited
    Inventors: Akira Naruse, Kouichi Kumon, Mitsuru Sato
  • Publication number: 20020174389
    Abstract: An apparatus which can collect information for a long time or collect information on an entire memory space with a small hardware physical quantity while avoiding unnecessary overhead. The apparatus comprises a counting unit for counting the number of events having occurred in a processor or a computer system, a retaining unit for retaining a count value obtained by the counting unit, and a control unit for controlling writing of a count value into the retaining unit, wherein the control unit controls the writing so as to write a new count value obtained by the counting unit in said retaining unit while leaving a count value of a high degree of significance in the retaining unit. The apparatus is used to measure the number of events having occurred in the processor when the performance of the processor or the a computer system is measured or tuned.
    Type: Application
    Filed: February 22, 2002
    Publication date: November 21, 2002
    Applicant: Fujitsu Limited
    Inventors: Mitsuru Sato, Kouichi Kumon
  • Publication number: 20010037497
    Abstract: The invention enables appropriately concentrating instruction strings or data pieces sporadically present in a plurality of regions over more than one compilation unit and adjusting the front-and-rear relationship of executed instruction strings without changing the program compilation unit such as a file, subroutine, or function and also without creating a link processing program for batch processing of the system as a whole. Different section names are given to the executed instruction strings and the unexecuted instruction strings and the referenced data and the unreferenced data of an object program respectively, so that, when an execution module is generated from the object program by linking, the sections having an executed section name and the sections having an unexecuted section name in a plurality of files may be aggregated respectively to divide the instructions into an execution portion and an unexecution portion.
    Type: Application
    Filed: April 2, 2001
    Publication date: November 1, 2001
    Inventor: Kouichi Kumon