Abstract: A vibration damping actuator including: a guide hole open onto a bottom face of a housing; a lid metal plate fitted into the opening of the guide hole with a size enough to hinder inward displacement thereof into the guide hole by an annular shoulder portion; an engaging groove disposed on an inner circumferential surface of the opening; a snap ring of C-letter shape fitted into the engaging groove to prevent the lid metal plate from becoming dislodged from the opening; and a sealing rubber layer formed covering an inside face of the lid metal plate. The lid metal plate is pressed by the snap so that the sealing rubber layer is pushed against the annular shoulder portion, thereby sealing the opening of the guide hole.

Abstract: When a control power source voltage becomes lower than an operation guarantee voltage level, the output of a start-up circuit assumes an H-level, a NOR gate produces an output shut-off signal of an L-level, and FETs are turned off. As the control power source voltage further decreases, the output shut-off control circuit loses stability in the operation. In this case, a resistor maintains the FETs in the OFF state due to its pull-down operation. As a result, the output of the output circuit is maintained in a high-impedance state over the whole range of control power source voltages lower than the operation guarantee voltage level.

Abstract: To downsize the circuit scale of a CPU in a microcomputer capable of executing multiple interrupt, an interrupt controller includes an interrupt mask level register. The CPU temporarily transfers or stacks processing data into a RAM. The processing data include a PSR (i.e., system register) value and a PC (i.e., program counter) value of the interrupt processing presently running in CPU. At the same time, the CPU sends a stack signal “STK” to the interrupt controller. In response to the stack signal “STK”, the interrupt controller temporarily transfers the interrupt mask level stored in the register into the RAM. When the CPU restarts the suspended interrupt processing, the CPU reads the PSR value and the PC value from the RAM while the CPU produces a return signal “RTN.” In response to the return signal “RTN”, the interrupt mask level is returned from the RAM to the register.

Abstract: A single-chip microprocessor integrated circuit (IC) with a power saving function. The power saving function is achieved by address bus control and/or unique clock circuit. The invention is applicable to a single-chip microprocessor including a CPU; a CPU address bus; and a peripheral circuit comprising a plurality of circuit blocks connected with a peripheral address bus. All or a part of address data provided on the CPU address bus is passed to the peripheral address bus only if the address data is a peripheral address. The passed address is used for address decoding that involves switching. An inventive clock circuit provides each of the circuit blocks with one of predetermined clock signals according to clock control data given by the CPU.

Abstract: The microcomputer shall be offered which has realized more simplified peripheral circuits and more reduced price, besides being provided with the functions of timer, runaway monitor and backup logic. To that effect, the address register and the register are installed which have two areas each in correspondence with two tasks (CPU0 and CPU1) to perform a pipeline processing of the two tasks in parallel and in time division by changing over alternately the two areas of the address register and the register by means of task switching signal. Then, while composing one task (L-task) with a fix-looped program for which a branch instruction is prohibited, the L-task is embedded with a routine to execute a runaway monitor and a timer operation for the other task (A-task). Furthermore, in case where anything abnormal is detected by L-task about the processing of A-task and it is reset, the L-task will execute a backup sequence to obtain a failsafe of the system.

Abstract: A power voltage of a power source circuit is produced by amplifying a threshold voltage difference of an operational amplifier by an amplification factor corresponding to a dividing ratio of a resistance dividing circuit. The power source circuit is integrated on a CMOS substrate together with a computer block. A plurality of analog switches are associated with the resistance dividing circuit to stabilize the power voltage of the power source circuit. One of these switches is selectively closed to change the dividing ratio of the resistance dividing circuit in accordance with actuation data stored in a control register.

Abstract: A communication apparatus is used in a communication system, having a communication line, where an operation timing in each of the communication apparatus is coupled to the communication line and synchronized with the received signals in each of the communication apparatus. This communication apparatus comprises a signal-chip microprocessor having a central processing unit for executing main and interruption processing, a register storing data to be transmitted next, an output buffer for transmitting the transmission data, and an edge detector for detecting an edge in the communication line. The output buffer is directly responsive to an edge detection circuit, so that the transmission data can be immediately transmitted in response to the detection of an edge without a variable delay time caused by the operation condition which may be varied by the interruption processing or like.

Abstract: For a system which receives a sleep command to terminate the application of machine clock signals to a microprocessor and which clocks control execution time and stabilization time after the return from sleep control and resumes the supply of the machine clock signal, the clocking device for each of the time durations is implemented using a small-scale timing device. Following a sleep command from a microprocessor, sleep control, which terminates the operation of the main oscillator and the machine clock generation circuit that generates the machine clock signal based on the oscillation of the main oscillator, is started. Then, counting the oscillation signal from an RC oscillator used for clocking using an RC timer, the lapse time after starting sleep control is started and if the clocked time reaches a predetermined time, the main oscillator is reactivated.

Abstract: In a receiving device, when a communication signal, which changes between low level and high level, is received via a filter circuit, an occurrence of an edge of the filtered received signal is monitored. Upon detection of the edge, a type of the edge, that is, whether the edge is a leading or trailing edge, is determined. Depending on the type of the edge, one of preset times prestored corresponding to types of the edges, is selected and starts to be measured. When the selected preset time elapses, the filtered received signal is sampled. With this arrangement, even when a filtering time of the filter circuit differs depending on a type of the edge of the communication signal, a constant sampling timing relative to the communication signal can be achieved irrespective of whether the detected edge is the leading or trailing edge.

Abstract: A process for producing chlorobenzene sulfochloride comprises adding a reaction mixture of chlorobenzene and chlorosulfonic acid to water or diluted sulfuric acid to decompose excess chlorosulfonic acid; driving off hydrogen chloride thereby generated, from the system; bringing the sulfuric acid concentration in the sulfuric acid layer upon completion of the decomposition to be from 60 to 90%; and then separating chlorobenzene sulfochloride. The process is characterized in that the excess chlorosulfonic acid is decomposed at a temperature of from 40.degree. to 85.degree. C. and the chlorobenzene sulfochloride is separated in a liquid state at a temperature of from 60.degree. to 80.degree. C.

Abstract: A powdery isotactic polyolefin having high isotactic characteristic and high bulk density and a narrow size distribution is produced by forming a polymerization catalyst system by reacting a Grignard reagent with a chain or cyclic hydropolysiloxane having the unit ##EQU1## (R.sup.1 represents an alkyl, aryl, aralkyl, alkoxy or aryloxy group; a is 0, 1 or 2; b is 1, 2 or 3 and a+b.ltoreq.3) to form a reaction product (a); reacting the reaction product (a) with at least one compound having the formulaR.sup.2.sub.n M.sup.(z) X.sub.z-n(R.sup.2 represents a C.sub.1 to C.sub.12 hydrocarbon moiety; M represents Al or Si; z represents atomic value of 3 or 4; X represents a halogen atom; n is 0, 1 . . . (z-1)) in the presence of an aromatic hydrocarbon solvent at lower than 85.degree. C.