Patents by Inventor Kouichi Shirai

Kouichi Shirai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10168541
    Abstract: A three-dimensional display device prevents a barrier wire breakage failure and includes a parallax barrier panel resistant to static electricity. The 3D display device has a liquid crystal parallax barrier panel disposed over a display panel. The parallax barrier panel has a first substrate having an electrode formed flat thereon and a second substrate having a display area, the first substrate and the second substrate having liquid crystal sandwiched therebetween. The second substrate has barrier electrodes extending in a first direction and arrayed at a first pitch in a second direction, has a first bus electrode extending in the second direction outside the display area along a first side thereof, and has a second bus electrode extending in the second direction outside the display area along a second side thereof opposite to the first side. The barrier electrodes are connected to the first and the second bus electrodes.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: January 1, 2019
    Assignee: Japan Display Inc.
    Inventors: Takahiro Ochiai, Keita Sasanuma, Syou Yanagisawa, Shinichirou Oka, Kouichi Shirai
  • Patent number: 10120197
    Abstract: A parallax barrier panel including a first substrate having a flat electrode, and a second substrate, the liquid crystal sandwiched therebetween. The second substrate has first barrier electrodes extending in a first direction and arrayed at a first pitch in a second direction, and has second barrier electrodes, the first and the second harrier electrodes having an interlayer insulating film interposed therebetween. Gaps between the first barrier electrodes are blocked by the second barrier electrodes when viewed in a plan view. Each of the first barrier electrodes is paired with one of the second barrier electrodes. Bus electrodes extend outside the display area along a side thereof. The first barrier electrodes are connected to the bus electrodes via first through holes formed in the interlayer insulating film. The second barrier electrodes are connected to the first barrier electrodes via second through holes formed in the interlay insulating film.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: November 6, 2018
    Assignee: Japan Display Inc.
    Inventors: Takahiro Ochiai, Shinichirou Oka, Keita Sasanuma, Kouichi Shirai
  • Patent number: 10021376
    Abstract: Second barrier electrodes are arranged under first barrier electrodes so as to fill gaps between the first barrier electrodes, while an insulating layer is located between the first barrier electrodes and the second barrier electrodes. The number of first barrier electrodes and the number of second barrier electrodes in each barrier pitch are 6 or more. The positions of the barriers formed by the first barrier electrodes and the second barrier electrodes are controlled by the reception of a signal representing detected positions of the eyes of a viewer. If pitches of the first barrier electrodes are defined as BE, and the widths of regions in which the first barrier electrodes are overlapped with the second barrier electrodes are defined as BA, a ratio BA/BE of the widths BA to the pitches BE are 0.3 or smaller. This configuration can suppress the occurrence of moire.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: July 10, 2018
    Assignee: Japan Display Inc.
    Inventors: Shinichiro Oka, Kouichi Shirai, Takahiro Ochiai, Amane Higashi
  • Patent number: 9715118
    Abstract: A parallax barrier panel includes plural sub-areas which are arranged in an X direction, plural light-shielding area each of which includes the plural sub-areas in a light-shielding state, and plural light-transmitting areas each of which includes the plural sub-areas in a light-transmitting state and which are arranged alternately with the plural light-shielding areas in the X direction. The sub-areas extend in a Y direction and can be switched between the light-transmitting state and the light-shielding state. Each of the sub-areas is provided with an electrode for controlling a liquid crystal layer. A first electric line is connected to an upper end part of the electrode, and a second electric line is connected to a lower end part of the electrode.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: July 25, 2017
    Assignee: Japan Display Inc.
    Inventors: Kouichi Shirai, Suguru Ishiwata
  • Publication number: 20160291338
    Abstract: A three-dimensional display device prevents a barrier wire breakage failure and includes a parallax barrier panel resistant to static electricity. The 3D display device has a liquid crystal parallax barrier panel disposed over a display panel. The parallax barrier panel has a first substrate having an electrode formed flat thereon and a second substrate having a display area, the first substrate and the second substrate having liquid crystal sandwiched therebetween. The second substrate has barrier electrodes extending in a first direction and arrayed at a first pitch in a second direction, has a first bus electrode extending in the second direction outside the display area along a first side thereof, and has a second bus electrode extending in the second direction outside the display area along a second side thereof opposite to the first side. The barrier electrodes are connected to the first and the second bus electrodes.
    Type: Application
    Filed: March 28, 2016
    Publication date: October 6, 2016
    Inventors: Takahiro OCHIAI, Keita SASANUMA, Syou YANAGISAWA, Shinichirou OKA, Kouichi SHIRAI
  • Publication number: 20160291337
    Abstract: A parallax barrier panel including a first substrate having a flat electrode, and a second substrate, the liquid crystal sandwiched therebetween. The second substrate has first barrier electrodes extending in a first direction and arrayed at a first pitch in a second direction, and has second barrier electrodes, the first and the second harrier electrodes having an interlayer insulating film interposed therebetween. Gaps between the first barrier electrodes are blocked by the second barrier electrodes when viewed in a plan view. Each of the first barrier electrodes is paired with one of the second barrier electrodes. Bus electrodes extend outside the display area along a side thereof. The first barrier electrodes are connected to the bus electrodes via first through holes formed in the interlayer insulating film. The second barrier electrodes are connected to the first barrier electrodes via second through holes formed in the interlay insulating film.
    Type: Application
    Filed: March 28, 2016
    Publication date: October 6, 2016
    Inventors: Takahiro OCHIAI, Shinichirou OKA, Keita SASANUMA, Kouichi SHIRAI
  • Publication number: 20150365655
    Abstract: Second barrier electrodes are arranged under first barrier electrodes so as to fill gaps between the first barrier electrodes, while an insulating layer is located between the first barrier electrodes and the second barrier electrodes. The number of first barrier electrodes and the number of second barrier electrodes in each barrier pitch are 6 or more. The positions of the barriers formed by the first barrier electrodes and the second barrier electrodes are controlled by the reception of a signal representing detected positions of the eyes of a viewer. If pitches of the first barrier electrodes are defined as BE, and the widths of regions in which the first barrier electrodes are overlapped with the second barrier electrodes are defined as BA, a ratio BA/BE of the widths BA to the pitches BE are 0.3 or smaller. This configuration can suppress the occurrence of moire.
    Type: Application
    Filed: June 11, 2015
    Publication date: December 17, 2015
    Inventors: Shinichiro OKA, Kouichi SHIRAI, Takahiro OCHIAI, Amane HIGASHI
  • Publication number: 20150346503
    Abstract: A parallax barrier panel includes plural sub-areas which are arranged in an X direction, plural light-shielding area each of which includes the plural sub-areas in a light-shielding state, and plural light-transmitting areas each of which includes the plural sub-areas in a light-transmitting state and which are arranged alternately with the plural light-shielding areas in the X direction. The sub-areas extend in a Y direction and can be switched between the light-transmitting state and the light-shielding state. Each of the sub-areas is provided with an electrode for controlling a liquid crystal layer. A first electric line is connected to an upper end part of the electrode, and a second electric line is connected to a lower end part of the electrode.
    Type: Application
    Filed: May 27, 2015
    Publication date: December 3, 2015
    Inventors: Kouichi SHIRAI, Suguru ISHIWATA
  • Publication number: 20100134715
    Abstract: A liquid crystal display device includes a liquid crystal display panel having liquid crystal material sandwiched between a pair of substrates, optical components disposed behind the liquid crystal display panel, a frame-like mold which houses the liquid crystal display panel and the optical components, and a frame which houses the frame-like mold. The frame includes a bottom portion and a sidewall, and the bottom portion is provided with plural engaging through holes which are formed along the sidewall not to extend into the sidewall. The frame-like mold is provided with plural engaging protrusions which are disposed correspondingly to the engaging holes and protrude downward beyond a lower surface of the frame-like mold. The frame-like mold and the frame are fixed together by inserting each of the engaging protrusions into a corresponding one of the engaging through holes.
    Type: Application
    Filed: February 1, 2010
    Publication date: June 3, 2010
    Inventor: Kouichi Shirai
  • Patent number: 7679694
    Abstract: A liquid crystal display device includes a liquid crystal display panel having liquid crystal material sandwiched between a pair of substrates, optical components disposed behind the liquid crystal display panel, a frame-like mold which houses the liquid crystal display panel and the optical components, and a frame which houses the frame-like mold. The frame includes a bottom portion and a sidewall, and the bottom portion is provided with plural engaging through holes which are formed along the sidewall not to extend into the sidewall. The frame-like mold is provided with plural engaging protrusions which are disposed correspondingly to the engaging holes and protrude downward beyond a lower surface of the frame-like mold. The frame-like mold and the frame are fixed together by inserting each of the engaging protrusions into a corresponding one of the engaging through holes.
    Type: Grant
    Filed: June 21, 2006
    Date of Patent: March 16, 2010
    Assignee: Hitachi Displays, Ltd.
    Inventor: Kouichi Shirai
  • Publication number: 20070002206
    Abstract: A liquid crystal display device includes a liquid crystal display panel having liquid crystal material sandwiched between a pair of substrates, optical components disposed behind the liquid crystal display panel, a frame-like mold which houses the liquid crystal display panel and the optical components, and a frame which houses the frame-like mold. The frame includes a bottom portion and a sidewall, and the bottom portion is provided with plural engaging through holes which are formed along the sidewall not to extend into the sidewall. The frame-like mold is provided with plural engaging protrusions which are disposed correspondingly to the engaging holes and protrude downward beyond a lower surface of the frame-like mold. The frame-like mold and the frame are fixed together by inserting each of the engaging protrusions into a corresponding one of the engaging through holes.
    Type: Application
    Filed: June 21, 2006
    Publication date: January 4, 2007
    Inventor: Kouichi Shirai
  • Patent number: 4770864
    Abstract: An SO.sub.2 -containing gas, in particular, pre-stage gas for the Claus reaction to recover sulfur can effectively be purified by removing NH.sub.3 contained therein using a TiO.sub.2 catalyst.
    Type: Grant
    Filed: June 9, 1987
    Date of Patent: September 13, 1988
    Assignees: Mitsui Miike Eng. Corp., Rhone-Poulenc Specialties Chimiques
    Inventors: Takayuki Fujimoto, Osamu Matsunaga, Susumu Chawanya, Kouichi Shirai, Morito Okamura, Thierry Dupin