Patents by Inventor Kouichi Takekawa

Kouichi Takekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5350947
    Abstract: A film carrier semiconductor device includes a film carrier tape, an outer lead bonding bump mounting portion, a semiconductor chip, inner lead bonding leads, and outer lead bonding bumps. The film carrier tape consists of a tape-like insulating material and has carrying and positioning sprocket holes in its both edge portions. The outer lead bonding bump mounting portion is formed in a central portion of the film carrier tape. The semiconductor chip is mounted on the outer lead bonding bump mounting portion and has electrode bumps formed on electrode pads. The inner lead bonding leads are formed into a predetermined pattern on the film carrier tape and connected to the electrode bumps. The outer lead bonding bumps are formed on the outer lead bonding bump mounting portion, to each of which one end of a corresponding one of the inner lead bonding leads is connected.
    Type: Grant
    Filed: October 28, 1992
    Date of Patent: September 27, 1994
    Assignee: NEC Corporation
    Inventors: Kouichi Takekawa, Michitaka Urushima
  • Patent number: 4763409
    Abstract: A method of manufacturing a semiconductor device employing a film carrier tape during process steps thereof is disclosed. Any test pad is not provided in the film carrier tape. Therefore, the semiconductor element carried in the film is cut at the leads and separated from the film carrier tape without conducting any electrical test. The separated semiconductor element is conducted the electrical test by installing it on a testing substrate which is provided to adapt to a large number of terminals.
    Type: Grant
    Filed: August 25, 1986
    Date of Patent: August 16, 1988
    Assignee: NEC Corporation
    Inventors: Kouichi Takekawa, Manabu Bonkohara
  • Patent number: 4714952
    Abstract: A capacitor built-in integrated circuit packaged unit comprising an electrically conductive support member, first and second lead elements associated with the conductive support member, a stack of a plurality of layers comprising a first insulating layer of a highly dielectric material formed on the conductive support member, an electrically conductive layer on the first insulating layer, and a second insulating layer on the conductive layer, the conductive layer having a portion exposed by the second insulating layer, a semiconductor integrated circuit chip having first and second electrodes which are electrically isolated from each other, the second insulating layer intervening between the conductive layer and the semiconductor integrated circuit chip, a bonding wire electrically connecting the first electrode to the first lead element, and a bonding wire electrically connecting the second electrode to the exposed portion of the conductive layer and to the second lead element.
    Type: Grant
    Filed: October 30, 1985
    Date of Patent: December 22, 1987
    Assignee: NEC Corporation
    Inventors: Kouichi Takekawa, Manabu Bonkohara