Patents by Inventor Kouji Fujiyama

Kouji Fujiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit and design method thereof
    Patent number: 8151238
    Abstract: In a layout process of a semiconductor integrated circuit, a power supply is initially formed in an arrangement in which the current threshold value is not exceeded. In a case where the excess over the current threshold value occurs after the power supply is formed, the power supply arrangement is changed according to the current threshold value, design rule data base, and power supply wiring density so as not to exceed the current threshold value.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: April 3, 2012
    Assignee: Panasonic Corporation
    Inventors: Kouji Fujiyama, Takahiro Nagatani, Atsushi Takahashi
  • SEMICONDUCTOR INTEGRATED CIRCUIT AND DESIGN METHOD THEREOF
    Publication number: 20110057320
    Abstract: In a layout process of a semiconductor integrated circuit, a power supply is initially formed in an arrangement in which the current threshold value is not exceeded. In a case where the excess over the current threshold value occurs after the power supply is formed, the power supply arrangement is changed according to the current threshold value, design rule data base, and power supply wiring density so as not to exceed the current threshold value.
    Type: Application
    Filed: November 10, 2010
    Publication date: March 10, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Kouji Fujiyama, Takahiro Nagatani, Atsushi Takahashi
  • Semiconductor integrated circuit and design method thereof
    Patent number: 7855579
    Abstract: In a layout process of a semiconductor integrated circuit, a power supply is initially formed in an arrangement in which the current threshold value is not exceeded. In a case where the excess over the current threshold value occurs after the power supply is formed, the power supply arrangement is changed according to the current threshold value, design rule data base, and power supply wiring density so as not to exceed the current threshold value.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: December 21, 2010
    Assignee: Panasonic Corporation
    Inventors: Kouji Fujiyama, Takahiro Nagatani, Atsushi Takahashi
  • Semiconductor integrated circuit and design method thereof
    Publication number: 20070124715
    Abstract: In a layout process of a semiconductor integrated circuit, a power supply is initially formed in an arrangement in which the current threshold value is not exceeded. In a case where the excess over the current threshold value occurs after the power supply is formed, the power supply arrangement is changed according to the current threshold value, design rule data base, and power supply wiring density so as not to exceed the current threshold value.
    Type: Application
    Filed: November 9, 2006
    Publication date: May 31, 2007
    Inventors: Kouji Fujiyama, Takahiro Nagatani, Atsushi Takahashi