Patents by Inventor Kouji Mochizuki

Kouji Mochizuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070132509
    Abstract: A class D amplifier is provided that is capable of reducing distortion of a specific sampling frequency, and frequencies that are multiples of this frequency to a level where an LPF is not required and small-scale control circuit. Class D amplifier 100 is provided with H (full) bridge output section 120, output control section 110 that is configured with random number generator 103 that takes individual random numbers that do not depend on input values as output values, and PWM control signal generating circuit 104 that generates a final PWM control signal from the input values and output values of random number generator 103. Output control section 110 divides a pulse signal outputted at a reference point between sampling frequencies into a plurality of pulse signals with random widths that do not include the reference point, and outputs the pulse signals with random widths.
    Type: Application
    Filed: December 11, 2006
    Publication date: June 14, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Kouji MOCHIZUKI
  • Patent number: 6963238
    Abstract: A high-precision and high-performance level shift circuit, which is not adversely influenced by an offset error owned by an operational amplifier. Two sets of resistors (4o) and (4p) having the same resistance values, which are connected between differential output terminals and an operational amplifier (4r) for performing a level shift control are provided. A feedback operation is carried out in such a manner that an average voltage of each of differential outputs (4i) and (4m) is continuously made coincident with a DC reference potential (4q) irrespective of an offset error of an output-purpose operational amplifier, and a level shift function having a small error is realized. Two resistors (4h and 4l) are series-connected between a differential output of a digital/analog converter (4a) and a level shift circuit to output a voltage outside an output dynamic range of the digital/analog converter (4a).
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: November 8, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Kouji Mochizuki
  • Publication number: 20040232970
    Abstract: A high-precision and high-performance level shift circuit is provided, which is not adversely influenced by an offset error owned by an operational amplifier, and an output dynamic range of a digital/analog converter of a signal source.
    Type: Application
    Filed: May 20, 2004
    Publication date: November 25, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO. LTD.
    Inventor: Kouji Mochizuki
  • Publication number: 20040040004
    Abstract: In a cell library database, timing verification is conducted on an LSI which exists in a variable power supply system capable of changing the source voltage arbitrarily and which includes logic delay information associated with a plurality of source voltages. The database is configured, for example, so that the voltage information V of the source is represented in multiple bits V [1:0] and delay times Alh (Vlh) to Bhl (Vhh) between the time input signals A and B are each changed and the time the output signal Y changes are described for respective pieces of source voltage information LH (1.2 V), HL (1.5 V) and HH (1.8 V). This allows timing verification in the variable source system which operates with the source voltage changed dynamically.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 26, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shiro Sakiyama, Kouji Mochizuki
  • Patent number: 5166092
    Abstract: A method of growing compound semiconductor epitaxial layer by an atomic layer epitaxy, comprises the steps of blowing on a predetermined surface a compound source material gas constituted by atoms having an ion polarity different from atoms constituting the predetermined surface so that the compound source material is adsorped on the predetermined surface in a non-decomposed state, and decomposing the adsorped compound source material on the predetermined surface into atoms constituting crystals at the predetermined surface so as to grow an atomic layer of atoms having the same ion polarity as the compound source material gas. The ion polarity of the atomic layer prevents adsorption of the compound source material after the atomic layer is grown.
    Type: Grant
    Filed: October 30, 1990
    Date of Patent: November 24, 1992
    Assignee: Fujitsu Limited
    Inventors: Kouji Mochizuki, Nobuyuki Ohtsuka, Masashi Ozeki
  • Patent number: 4861417
    Abstract: A method of growing a group III-V compound semiconductor epitaxial layer on a substrate by use of atomic layer epitaxy grows an aluminum layer on one of {100}, (111)B, ( 111)B, (111)B, and (111)B planes of the substrate by supplying a quantity of aluminum amounting to at least two times a surface density in a group III-V compound semiconductor epitaxial layer or grows an aluminum layer on one of {110} planes of the substrate by supplying a quantity of aluminum amounting to at least three times the surface density in the group III-V compound semiconductor epitaxial layer, and grows a layer of a group V material on the aluminum layer by supplying a quantity of the group V material amounting to at least two or three times a surface density in the group III-V compound semiconductor epitaxial layer. The layer of the group V material and the aluminum layer constituting the group III-V compound semiconductor epitaxial layer.
    Type: Grant
    Filed: March 24, 1988
    Date of Patent: August 29, 1989
    Assignee: Fujitsu Limited
    Inventors: Kouji Mochizuki, Masashi Ozeki, Nobuyuki Ohtsuka