Abstract: The present invention relates to an electrode material, an electrode, an electrical storage device and a lithium-ion capacitor, and the electrode material includes a carbon material and reduces its weight at a temperature not more than 650° C. by 20% relative to the weight thereof before heating when thermogravimetric analysis is performed on the electrode material with a heating rate of 5° C./min in an air flow at a rate of 100 ml/min.

Abstract: The present invention relates to a production process for an electrode material, an electrode and an electric storage device, and the production process for an electrode material comprises a step of heating a polymer having a silicon-containing unit and a silicon-non-containing unit.

Abstract: The present invention relates to an electrode material, an electrode, an electrical storage device and a lithium-ion capacitor, and the electrode material includes a carbon material and reduces its weight at a temperature not more than 650° C. by 20% relative to the weight thereof before heating when thermogravimetric analysis is performed on the electrode material with a heating rate of 5° C./min in an air flow at a rate of 100 ml/min.

Abstract: The present invention relates to a production process for an electrode material, an electrode and an electric storage device, and the production process for an electrode material comprises a step of heating a polymer having a silicon-containing unit and a silicon-non-containing unit.

Abstract: A semiconductor device using, e.g., a fluorine containing carbon film, as an interlayer dielectric film is produced by a dual damascene method which is a simple technique. After an dielectric film, e.g., an SiO2 film 3, is deposited on a substrate 2, the SiO2 film 3 is etched to form a via hole 31 therein, and then, a top dielectric film, e.g., a CF film 4, is deposited on the top face of the SiO2 film 3. If the CF film is deposited by activating a thin-film deposition material having a bad embedded material, e.g., C6F6 gas, as a plasma, the CF film 4 can be deposited on the top face of the SiO2 film 3 while inhibiting the CF film from being embedded into the via hole 31. Subsequently, by etching the CF film 4 to form a groove 41 therein, it is possible to easily produce a dual damascene shape wherein the groove 41 is integrated with the via hole 31.

Abstract: A semiconductor device having reduced interconnect delay and increased interconnect reliability and a method of manufacturing the same are provided. A plurality of interconnects 12a through 12f are formed on a base insulating layer 10 with different interconnect pitches P1 through P3. Next, an adhesion inhibiting layer inhibiting adhesion to an interlayer insulating layer 16 formed on the interconnects is formed in the space between adjacent interconnects of a smaller interconnect pitch in which space the interconnect delay is predicted to exceed a predetermined value due to interconnect design. In a formed semiconductor device 18, gaps of a small dielectric constant are formed in the spaces between interconnects of the smaller interconnect pitches (parts C), while an insulating film is buried selectively in the spaces between interconnects of the larger interconnect pitches (parts A and B).