Patents by Inventor Kouji Takeda
Kouji Takeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9540459Abstract: To provide a method of efficiently affording olefin polymers having a high molecular weight and a high melting point even under industrially advantageous high-temperature conditions. A production method of an olefin polymer to solve the above problem includes polymerizing monomer(s) including at least one ?-olefin having 3 or more carbon atoms at 50° C. to 200° C. in the presence of an olefin polymerization catalyst including; (A) a crosslinked metallocene compound represented by General Formula [I] below; and (B) at least one compound selected from (b-1) an organoaluminum oxy-compound, (b-2) a compound that forms an ion pair by reacting with the crosslinked metallocene compound (A), and (b-3) an organoalunimum compound.Type: GrantFiled: March 11, 2014Date of Patent: January 10, 2017Assignee: MITSUI CHEMICALS, INC.Inventors: Ikuko Ebisawa, Hideo Kitagawa, Takashi Yukita, Masahiro Yamashita, Kouji Takeda, Hiromu Kaneyoshi
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Publication number: 20160039952Abstract: To provide a method of efficiently affording olefin polymers having a high molecular weight and a high melting point even under industrially advantageous high-temperature conditions. A production method of an olefin polymer to solve the above problem includes polymerizing monomer(s) including at least one ?-olefin having 3 or more carbon atoms at 50° C. to 200° C. in the presence of an olefin polymerization catalyst including; (A) a crosslinked metallocene compound represented by General Formula [I] below; and (B) at least one compound selected from (b-1) an organoaluminum oxy-compound, (b-2) a compound that forms an ion pair by reacting with the crosslinked metallocene compound (A), and (b-3) an organoalunimum compound.Type: ApplicationFiled: March 11, 2014Publication date: February 11, 2016Applicant: MITSUI CHEMICALS, INC.Inventors: Ikuko EBISAWA, Hideo KITAGAWA, Takashi YUKITA, Masahiro YAMASHITA, Kouji TAKEDA, Hiromu KANEYOSHI
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Publication number: 20150085913Abstract: A data receiving circuit that can accurately obtain a data signal corresponding to information data from a high speed high density transmitted signal, and a semiconductor device including the data receiving circuit. The amplitude of a first differential signal corresponding to a level difference between a pair of received differential signals, generated in a first differential stage, is amplified and binalized to obtain a received data signal. A second differential signal corresponding to the level difference between the received differential signals, and a third differential signal which is a phase-inverted signal of the second differential signal are generated in a second differential stage provided separately, and a current corresponding to the second differential signal and a current corresponding to the third differential signal are discharged into the respective ones of the pair of transmission lines, thereby suppressing the amplitudes of the received differential signals.Type: ApplicationFiled: December 4, 2014Publication date: March 26, 2015Applicant: LAPIS SEMICONDUCTOR CO., LTD.Inventors: Hideaki HASEGAWA, Kouji TAKEDA
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Patent number: 8861659Abstract: A data receiving circuit and a data receiving method accurately acquire a data signal corresponding to information data from a high speed high density transmitted signal. An increase or a decrease of the level of one of a amplified data signal and a level converted data signal that is transmitted from one, referred to as one processing stage, of an amplification processing stage and a level converting processing stage, is fed back to a stage preceding the one processing stage. The amplification processing stage supplies, to a first line, an amplified data signal obtained by performing an amplification processing on a received data signal, and the level converting processing stage transmits, via a second line, a level converted data signal obtained by performing a level converting processing on the amplified data signal.Type: GrantFiled: February 28, 2013Date of Patent: October 14, 2014Assignee: Lapis Semiconductor Co., Ltd.Inventors: Hideaki Hasegawa, Kouji Takeda, Toshio Itou, Yuuichi Ike
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Publication number: 20130251077Abstract: A data receiving circuit an a data receiving method accurately acquire a data signal corresponding to information data from a high speed high density transmitted signal. An increase or a decrease of the level of one of a amplified data signal and a level converted data signal that is transmitted from one, referred to as one processing stage, of an amplification processing stage and a level converting processing stage, is fed back to a stage preceding the one processing stage. The amplification processing stage supplies, to a first line, an amplified data signal obtained by performing an amplification processing on a received data signal, and the level converting processing stage transmits, via a second line, a level converted data signal obtained by performing a level converting processing on the amplified data signal.Type: ApplicationFiled: February 28, 2013Publication date: September 26, 2013Applicant: LAPIS SEMICONDUCTOR CO., LTD.Inventors: Hideaki Hasegawa, Kouji Takeda, Toshio Itou, Yuuichi Ike
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Patent number: 6326803Abstract: A termination circuit to reduce the overshoot and undershoot that are generated when switching the voltage level of a transmission line. The terminating circuit (11) has a termination switching circuit (40) and an auxiliary switching circuit (41). When the voltage level of the termination (5) of the transmission line (4) is switched from a low level to a high level, the termination switching circuit (40) switches the termination (5) that is connected to the ground potential at a low level to the power supply voltage (Vcc) corresponding to a high level, but before that connection is completed, due to the fact that the auxiliary switching circuit (41) temporarily connects the termination (5) to the ground potential corresponding to a low level, the impedance of the terminating circuit (11) is temporarily lowered. Therefore, the overshoot and the undershoot that were generated in the past when switching the voltage level can be reduced.Type: GrantFiled: October 24, 2000Date of Patent: December 4, 2001Assignee: Texas Instruments IncorporatedInventor: Kouji Takeda
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Patent number: 6036367Abstract: This slider assembly has a stopper of one-piece structure that prevents the slider from coming off the rail member and which can easily be attached to and removed from the rail member and be manufactured at low cost. The slider of the slider assembly that can slide relative to the track rail is prevented by the stopper from coming off the track rail. The stopper comprises an embracing portion that embraces the slider on one side of the track rail and locking portions provided at both ends of the embracing portion. The embracing portion comprises a pair of leg portions and a bridge portion, and the locking portions each include a bent portion and a hook portion. The hook portions engage in the engagement portions as engagement holes formed in the track rail.Type: GrantFiled: August 18, 1998Date of Patent: March 14, 2000Assignee: Nippon Thompson Co., Ltd.Inventor: Kouji Takeda
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Patent number: 5845561Abstract: An apparatus for preparing a coffee beverage by supplying the ground coffee beans fed from a coffee mill for grinding coffee beans to an extractor to prepare the coffee beverage is disclosed, wherein a device for removing the silver skins out of the coffee beans ground by the coffee mill is provided therewith.Type: GrantFiled: April 16, 1997Date of Patent: December 8, 1998Assignee: Sanyo Electric Co., Ltd.Inventors: Noboru Chigira, Naoto Fukushima, Kazuhiro Uehara, Masakazu Sakata, Kouji Takeda
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Patent number: 5748022Abstract: An input circuit which prevents erroneous operation caused by noise. An input stage has a NMOS transistor N11 and a PMOS transistor P11. A NMOS transistor N12 is connected in series between a ground line and the source of the NMOS transistor N11. A PMOS transistor P12 coupled to a voltage supply line V.sub.cc acts as a current control element. NMOS transistors N13 and N14 are connected in series between the ground line and the drain of PMOS transistor P12. Inverters IV11 and IV12 delay the voltage of an intermediate output node S11 and supply it to the gate of NMOS transistor N13. The gate of NMOS transistor N12 is coupled to a node S13, the gate of NMOS transistor N14 is coupled to the input line for an input signal IN, and node S13 is formed to function as a voltage sensor with respect to the ground.Type: GrantFiled: October 31, 1995Date of Patent: May 5, 1998Assignee: Texas Instruments IncorporatedInventor: Kouji Takeda
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Patent number: 4733455Abstract: A magnetic head using an MR element and a permanent magnet for applying a bias magnetic field to the MR element, and a lead frame of the head. A sheet of metal is punched or otherwise shaped in a predetermined pattern to produce the lead frame. The lead frame includes sections mounting the MR element and permanent magnet, lead connecting sections electrically connected to connecting sections of the MR element, and tape-contact sections which are flush with a tape-contact surface of the MR element. The lead frame mounted with the MR element and permanent magnet and provided with the lead connecting sections is placed in a metal mold having a predetermined configuration and buried and fixed in place in synthetic resin.Type: GrantFiled: July 29, 1986Date of Patent: March 29, 1988Assignee: Victor Company of Japan, LimitedInventors: Hiroshi Nakamura, Masaki Murakami, Kouji Takeda, Yoshimasa Tanaka, Hirofumi Imaoka, Mikio Naoi, Takayuki Nakashima