Patents by Inventor Kouji Tateishi

Kouji Tateishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150285348
    Abstract: An electric linear actuator has a housing, an electric motor, a speed reduction mechanism and a ball screw mechanism. The electric linear actuator further includes an anti-rotation mechanism to prevent rotation of the screw shaft relative to the housing. The anti-rotation mechanism includes a sleeve and guide pin. The sleeve fits into a blind bore of the housing. The guide pin mounts on the end of the screw shaft, via a through aperture in the screw shaft. The guide pin engages linear recessed grooves of the sleeve. The sleeve is fit into a blind bore of the housing so that flat portions formed on an outer circumference of the sleeve engage flat surfaces formed on an inner circumference of the blind bore of the housing to prevent rotation of the sleeve relative to the housing.
    Type: Application
    Filed: April 11, 2015
    Publication date: October 8, 2015
    Inventors: Yoshinori IKEDA, Keisuke KAZUNO, Kensuke FUNADA, Kouji TATEISHI
  • Patent number: 5661086
    Abstract: Method for producing semiconductor devices comprises a first step in which a plurality of metal substrates each of which is provided with a die mounting region at a central portion thereof are connected in series to produce a train of connected metal substrates by means of first connecting tabs and a pair of first side rails each of which is provided with first positioning pilot apertures are connected to the train by means of second connecting tabs to produce a metal substrate frame, a second step in which a plurality of circuit substrates each of which is provided with a lead pattern around an opening formed at the central portion thereof are connected in series by means of third connecting tabs to produce a train of connected circuit substrates and a pair of second side rails each of which is provided with second positioning pilot apertures are connected by fourth connecting tabs to produce a circuit substrate frame, a third step in which both frames are alinged with each other making use of the first and
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: August 26, 1997
    Assignee: Mitsui High-Tec, Inc.
    Inventors: Takashi Nakashima, Keiji Takai, Kouji Tateishi
  • Patent number: 5614443
    Abstract: Method of producing a frame made of connected semiconductor die mounting substrates comprises i) a first step for producing a metal substrate sheet wherein an original material for metal substrate sheet of a desired size is cut out from a metal material and an erosion preventing layer is provided on the entire surface thereof, ii) a second step for producing a circuit substrate sheet wherein the circuit substrate sheet is made of a resin substrate coated with a copper leaf layer and is provided with a lead pattern on the surface thereof in place, iii) a third step for producing a connected semiconductor die mounting substrate sheet by adhering the metal substrate sheet to the circuit substrate sheet, iv) a fourth step for forming a plurality of pilot apertures and slits on the connected semiconductor die mounting substrate sheet by press working and v) a fifth step for producing a plurality of connected semiconductor die mounting substrate frames by separating the connected semiconductor die mounting substrat
    Type: Grant
    Filed: March 27, 1996
    Date of Patent: March 25, 1997
    Assignee: Mitsui High-tec, Inc.
    Inventors: Takashi Nakashima, Keiji Takai, Kouji Tateishi