Abstract: Onto the surface of a dressing tool for removing the clogging of an abrasive cloth, diamond grains of plural groups each having a different average particle diameter are subjected to be mixed and then fixed. In this state, the upper end of small diamond grains 4 is projected over nickel plating 2. Thereby foreign substances aggregated in the concave of the abrasive cloth are effectively removed and at the same time wearing the surface of the nickel plating 2 is prevented. Achieved are the stabilization of a polishing speed in polishing and the inhibition of dropping out diamond grains and wearing nickel plating in dressing.

Abstract: The apparatus (method) for polishing semiconductor device is equipped with a polish pad which comprises an upper layer material and a lower layer material of differing degrees of hardness overlying one another, whereby a semiconductor wafer is polished while being pressed against the polish pad, the degree of hardness of the upper layer material of the polish pad being set at Shore spring A hardness 92-98.5, and the degree of hardness of the lower layer material of the polish pad at Shore spring A hardness 78-87.5.

Abstract: A method of planarizing an interlayer dielectric layer in a semiconductor integrated circuit device is provided, which method can remove remaining parts of the dielectric layer without removing the surface of the layer itself at a high throughput. After an insulating layer is formed on a chief surface of the semiconductor substructure, an interconnection layer having interconnection lines is formed on the insulating layer. An interlayer dielectric layer is formed on the insulating layer so as to cover the interconnection layer. The dielectric layer has steps or protrusions at positions corresponding to the underlying interconnection lines of the interconnection layer. Next, a patterned resist film is formed on the interlayer dielectric layer so as to have an inverted geometric shape relative to that of the interconnection layer. Then, using the patterned resist film as a mask, the interlayer dielectric layer is selectively etched to thereby partially remove the top of the protrusions by a predetermined depth.

Abstract: A process for manufacturing a semiconductor device which prevents a short-circuit between a source region, a drain region and a gate electrode of a transistor. The process includes forming a sacrificial BPSG film on at least one of a top surface and a sidewalls of the gate electrode of the transistor, and forming a silicide film and removing the BPSG film by etching through a thin, incomplete, and unwanted silicide film formed on the BPSG film. In the step of removing the BPSG film, the unwanted silicide film formed on the BPSG film is also removed.