Patents by Inventor Kouji Yabushita

Kouji Yabushita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6621537
    Abstract: An electrooptical element used in liquid crystal display accordance to this invention is provided with a storage capacitance wiring group and collective drawing wiring. At the time of wet etching of transparent conductor film of pixel electrodes, all wiring of the storage capacitance wiring group are electrically separated each other, and after wet etching of the pixel electrodes, all of the storage capacitance wiring group are electrically connected with collective drawing wiring. The capacitance value of the storage capacitance wiring is small at the time of wet etching of the pixel electrodes, thus preventing the corrosion of the storage capacitance wiring.
    Type: Grant
    Filed: October 5, 1999
    Date of Patent: September 16, 2003
    Assignee: Advanced Display Inc.
    Inventors: Nobuhiro Nakamura, Kouji Yabushita, Osamu Ito
  • Patent number: 6399428
    Abstract: A manufacturing process OF a thin film transistor is provided, in which occurrence of a dry spot and occurrence of an etch residue of an ohmic contact layer (n+a-Si:H film) due to the dry spot are prevented in photoengraving process for patterning a semiconductor layer and the ohmic contact layer into an island, without any further treatment by any other apparatus. After forming the a-Si:H film 4a which forms the semiconductor layer of the TFT and the n+a-Si:H film 5a which forms the ohmic contact layer, a N2 gas plasma discharge is continuously performed using the same plasma CVD apparatus, thereby forming a very thin silicon nitride film 6 having a hydrophilic property on a surface layer of the n+a-Si:H film 5a.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: June 4, 2002
    Assignees: Kabushiki Kaisha Advanced Display, Mitsubishi Electric Corporation
    Inventors: Tadaki Nakahori, Tetsuya Sakoguchi, Kazuhiko Noguchi, Kouji Yabushita, Takeshi Kubota
  • Patent number: 6353464
    Abstract: A manufacturing method of a liquid crystal display is provided. The liquid crystal display having a picture element electrode formed on the uppermost layer of a structure is capable of reducing connection resistance between picture element electrode and drain electrode through interlayer insulating film. At the time of forming the picture element electrode, ITO film can be patterned into a desirable pattern without short circuit between assembled terminals in one etching process. In the process of forming a contact hole 112 for connecting the picture element electrode 113 and the drain electrode 108 on the interlayer insulating film 111 and on the passivation film 110, a dry etching condition is established so that after the ashing process using O2 gas to remove residue on the bottom of the contact hole 112, an etching process using fluorine gas +O2 gas etc. is performed to reduce irregularity on the surface of the interlayer insulating film 111.
    Type: Grant
    Filed: November 9, 1999
    Date of Patent: March 5, 2002
    Assignee: Kabushiki Kaisha Advanced Display
    Inventors: Shigeaki Noumi, Kouji Yabushita
  • Patent number: 6317174
    Abstract: A manufacturing method of a liquid crystal display is provided. The liquid crystal display having a picture element electrode formed on the uppermost layer of a structure is capable of reducing connection resistance between picture element electrode and drain electrode through interlayer insulating film. At the time of forming the picture element electrode, ITO film can be patterned into a desirable pattern without short circuit between assembled terminals in one etching process. In the process of forming a contact hole 112 for connecting the picture element electrode 113 and the drain electrode 108 on the interlayer insulating film 111 and on the passivation film 110, a dry etching condition is established so that after the ashing process using O2 gas to remove residue on the bottom of the contact hole 112, an etching process using fluorine gas+O2 gas etc. is performed to reduce irregularity on the surface of the interlayer insulating film 111.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: November 13, 2001
    Assignee: Kabushiki Kaisha Advanced Display
    Inventors: Shigeaki Noumi, Kouji Yabushita
  • Publication number: 20010007358
    Abstract: A manufacturing process OF a thin film transistor is provided, in which occurrence of a dry spot and occurrence of an etch residue of an ohmic contact layer (n+a-Si:H film) due to the dry spot are prevented in photoengraving process for patterning a semiconductor layer and the ohmic contact layer into an island, without any further treatment by any other apparatus.
    Type: Application
    Filed: February 1, 2001
    Publication date: July 12, 2001
    Applicant: Kabushiki Kaisha Advanced Display
    Inventors: Tadaki Nakahori, Tetsuya Sakoguchi, Kazuhiko Noguchi, Kouji Yabushita, Takeshi Kubota
  • Patent number: 6236062
    Abstract: A manufacturing process OF a thin film transistor is provided, in which occurrence of a dry spot and occurrence of an etch residue of an ohmic contact layer (n+ a-Si:H film) due to the dry spot are prevented in photoengraving process for patterning a semiconductor layer and the ohmic contact layer into an island, without any further treatment by any other apparatus. After forming the a-Si:H film 4a which forms the semiconductor layer of the TFT and the n+ a-Si:H film 5a which forms the ohmic contact layer, a N2 gas plasma discharge is continuously performed using the same plasma CVD apparatus, thereby forming a very thin silicon nitride film 6 having a hydrophilic property on a surface layer of the n+ a-Si:H film 5a.
    Type: Grant
    Filed: October 5, 1998
    Date of Patent: May 22, 2001
    Assignees: Kabushiki Kaisha Advanced Display, Mitsubishi Electric Corporation
    Inventors: Tadaki Nakahori, Tetsuya Sakoguchi, Kazuhiko Noguchi, Kouji Yabushita, Takeshi Kubota
  • Patent number: 5999235
    Abstract: A method of manufacturing TFT array substrate comprises forming a control electrode and a control electrode line on a transparent insulating substrate, forming an insulating film on the control electrode and the control electrode line, forming a semiconductor layer through the insulating film on the control electrode and the control electrode line, forming a transparent conductive film on the insulating film, forming a picture element electrode by etching the transparent conductive film with an etchant including concentrated hydrochloric acid mixed with concentrated sulfuric acid and having water as main component, and forming a pair of electrodes on the semiconductor layer.
    Type: Grant
    Filed: June 20, 1997
    Date of Patent: December 7, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Tooru Takeguchi, Kouji Yabushita, Masami Hayashi