Patents by Inventor Kouji YAMAKI

Kouji YAMAKI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10230860
    Abstract: In accordance with an embodiment, an authentication apparatus comprises an image capturing device, a memory and a controller. The image capturing device photographs a person to acquire a captured image. The memory stores the captured image. The controller generates a determination reference of authentication on the basis of a plurality of the captured images and carries out the authentication of the person in the captured image on the basis of the determination reference.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: March 12, 2019
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA TEC KABUSHIKI KAISHA
    Inventor: Kouji Yamaki
  • Publication number: 20180041654
    Abstract: In accordance with an embodiment, an authentication apparatus comprises an image capturing device, a memory and a controller. The image capturing device photographs a person to acquire a captured image. The memory stores the captured image. The controller generates a determination reference of authentication on the basis of a plurality of the captured images and carries out the authentication of the person in the captured image on the basis of the determination reference.
    Type: Application
    Filed: August 8, 2016
    Publication date: February 8, 2018
    Inventor: Kouji Yamaki
  • Publication number: 20120110219
    Abstract: According to one embodiment, a data processing circuit included in a data processing apparatus together with plural peripheral circuits including a peripheral circuit configured to output first data includes a processing unit and a stop unit. The processing unit subjects the first data to data processing according to a specified processing algorithm to obtain second data. The stop unit stops the output of the second data to the outside of the data processing circuit in a stop period excluding a period from the time when the plural peripheral circuits finish starting in specified start order until the time when a specified time elapses after the plural peripheral circuits finish stopping in specified stop order.
    Type: Application
    Filed: November 2, 2011
    Publication date: May 3, 2012
    Applicants: Toshiba Tec Kabushiki Kaisha, Kabushiki Kaisha Toshiba
    Inventor: Kouji YAMAKI