Patents by Inventor Kouki Hagiya

Kouki Hagiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Lead on chip semiconductor memory device with multiple bit configuration
    Patent number: 5880531
    Abstract: A semiconductor memory device having inner lead portions of a plurality of leads disposed through at least one insulating film on a semiconductor chip and electrically insulated from the semiconductor chip, includes bonding pads for at least data input/output arranged in two rows axially symmetrically in a substantially central portion of the semiconductor chip interposed between memory arrays and bonding wires for connecting the inner lead portions and the bonding pads.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: March 9, 1999
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Kouki Hagiya, Ken Shibata
  • Semiconductor memory device bonding pad arrangement
    Patent number: 5473198
    Abstract: A semiconductor memory device having inner lead portions of a plurality of leads disposed through at least one insulating film on a semiconductor chip and electrically insulated from the semiconductor chip, includes bonding pads for at least data input/output arranged in two rows axially symmetrically in a substantially central portion of the semiconductor chip interposed between memory arrays and bonding wires for connecting the inner lead portions and the bonding pads.
    Type: Grant
    Filed: June 10, 1994
    Date of Patent: December 5, 1995
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Kouki Hagiya, Ken Shibata